AT89C51IC2_04 Datasheet, PDF (93/146 Pages) ATMEL Corporation – 8-bit Flash Microcontroller with 2-wire Interface

AT89C51IC2
Table 69. Status in master receiver mode
Status Status of the Two-
Code wire Bus and Two-
SSSTA wire Hardware
Application software response
To SSCON
To/From SSDAT SSSTA SSSTO SSI
08h
A START condition has
been transmitted
Write SLA+R
X
0
0
A repeated START
10h condition has been
transmitted
Write SLA+R
Write SLA+W
X
0
0
X
0
0
Arbitration lost in
No SSDAT action
0
38h SLA+R or NOT ACK
bit
No SSDAT action
1
SLA+R has been
No SSDAT action
0
40h transmitted; ACK has
been received
No SSDAT action
0
No SSDAT action
1
48h
SLA+R has been
transmitted; NOT ACK
No SSDAT action
0
has been received
No SSDAT action
1
Data byte has been Read data byte
0
50h received; ACK has
been returned
Read data byte
0
Read data byte
1
Data byte has been
58h received; NOT ACK
Read data byte
0
has been returned
Read data byte
1
0
0
0
0
0
0
0
0
0
0
1
0
1
0
0
0
0
0
0
0
1
0
1
0
SSAA Next Action Taken by Two-wire Hardware
X SLA+R will be transmitted.
X ^{SLA+R will be transmitted.}
X
SLA+W will be transmitted.
Logic will switch to master transmitter mode.
X
Two-wire bus will be released and not addressed
slave mode will be entered.
X
A START condition will be transmitted when the bus
becomes free.
0 Data byte will be received and NOT ACK will be
returned.
1 Data byte will be received and ACK will be returned.
X ^{Repeated START will be transmitted.}
X
STOP condition will be transmitted and SSSTO flag
will be reset.
X
STOP condition followed by a START condition will
be transmitted and SSSTO flag will be reset.
0 Data byte will be received and NOT ACK will be
returned.
1 Data byte will be received and ACK will be returned.
X ^{Repeated START will be transmitted.}
X
STOP condition will be transmitted and SSSTO flag
will be reset.
X
STOP condition followed by a START condition will
be transmitted and SSSTO flag will be reset.
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4301A–8051–01/04