AT26DF161_08 Datasheet, PDF(9/34 Page) ATMEL Corporation – 16-megabit 2.7-volt Only Serial Firmware DataFlash Memory

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AT26DF161_08 Datasheet, PDF (9/34 Pages) ATMEL Corporation – 16-megabit 2.7-volt Only Serial Firmware DataFlash Memory

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AT26DF161

Figure 8-1. Byte Program

SCK

0 1 2 3 4 5 6 7 8 9 10 11 12

29 30 31 32 33 34 35 36 37 38 39

OPCODE

ADDRESS BITS A23-A0

DATA IN

0 0 0 0 0 0 1 0AAAAAA

MSB

AAADDDDDDDD

MSB

HIGH-IMPEDANCE

Figure 8-2. Page Program

SCK

0123456789

29 30 31 32 33 34 35 36 37 38 39

OPCODE

ADDRESS BITS A23-A0

DATA IN BYTE 1

0 0 0 0 0 0 1 0AAA

MSB

AAADDDDDDDD

MSB

HIGH-IMPEDANCE

DATA IN BYTE n

DDDDDDDD

MSB

8.2 Block Erase

A block of 4K-, 32K-, or 64K-bytes can be erased (all bits set to the logical â1â state) in a single

operation by using one of three different opcodes for the Block Erase command. An opcode of

20h is used for a 4K-byte erase, an opcode of 52h is used for a 32K-byte erase, and an opcode

of D8h is used for a 64K-byte erase. Before a Block Erase command can be started, the Write

Enable command must have been previously issued to the device to set the WEL bit of the Sta-

tus Register to a logical â1â state.

To perform a Block Erase, the CS pin must first be asserted and the appropriate opcode (20h,

52h, or D8h) must be clocked into the device. After the opcode has been clocked in, the three

address bytes specifying an address within the 4K-, 32K-, or 64K-byte block to be erased must

be clocked in. Any additional data clocked into the device will be ignored. When the CS pin is

deasserted, the device will erase the appropriate block. The erasing of the block is internally

self-timed and should take place in a time of tBLKE.

Since the Block Erase command erases a region of bytes, the lower order address bits do not

need to be decoded by the device. Therefore, for a 4K-byte erase, address bits A11-A0 will be

ignored by the device and their values can be either a logical â1â or â0â. For a 32K-byte erase,

address bits A14-A0 will be ignored, and for a 64K-byte erase, address bits A15-A0 will be

ignored by the device. Despite the lower order address bits not being decoded by the device, the

complete three address bytes must still be clocked into the device before the CS pin is deas-

serted; otherwise, the device will abort the operation and no erase operation will be performed.

3599GâDFLASHâ8/08

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