M90E26_14 Datasheet, PDF (8/60 Pages) ATMEL Corporation – Single-Phase High-Performance Wide-Span

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PIN DESCRIPTION
Table-1 Pin Description
Name
Pin No.
I/O ^{note 1}
Reset
4
I
DVDD
DGND
AVDD
Vref
AGND
I1P
I1N
I2P
I2N
VP
VN
3
I
2
I
5
I
13
O
6, 14
I
10
11
I
7
8
I
16
15
I
USEL
12
I
CS
24
I
SCLK
25
I
Type
LVTTL
Power
Power
Power
Analog
Power
Analog
Analog
Analog
LVTTL
Description
Reset: Reset Pin (active low)
This pin should connect to ground through a 0.1μF filter capacitor. In appli-
cation it can also directly connect to one output pin from microcontroller
(MCU).
DVDD: Digital Power Supply
This pin provides power supply to the digital part. It should be decoupled
with a 10μF electrolytic capacitor and a 0.1μF capacitor.
DGND: Digital Ground
AVDD: Analog Power Supply
This pin provides power supply to the analog part. It should be decoupled
with a 0.1μF capacitor.
Vref: Output Pin for Reference Voltage
This pin should be decoupled with a 1μF capacitor and a 1nF capacitor.
AGND: Analog Ground
I1P: Positive Input for L Line Current
I1N: Negative Input for L Line Current
These pins are differential inputs for L line current. Input range is
5μVrms~25mVrms when gain is '24'.
I2P: Positive Input for N Line Current
I2N: Negative Input for N Line Current
These pins are differential inputs for N line current. Input range is
120μVrms~600mVrms when gain is '1'.
VP: Positive Input for Voltage
VN: Negative Input for Voltage
These pins are differential inputs for voltage. Input range is
120μVrms~600mVrms.
USEL: UART/SPI Interface Selection
High: UART interface
Low: SPI interface
LVTTL
Note: This pin should not change after reset.
CS: Chip Select (Active Low) of SPI
In 4-wire SPI mode, this pin must be driven from high to low for each read/
write operation, and maintain low for the entire operation. In 3-wire SPI
mode, this pin must be low all the time. Refer to section 4.1.
LVTTL
In UART interface, this pin should be connected to VDD.
SCLK: Serial Clock of SPI
This pin is used as the clock for the SPI interface. Data on SDI is shifted into
the chip on the rising edge of SCLK while data on SDO is shifted out of the
chip on the falling edge of SCLK.
In UART interface, this pin should be connected to ground.
M90E26 [DATASHEET]
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Atmel-46002B-SE-M90E26-Datasheet_110714