AT89LP51_11 Datasheet, PDF (8/113 Pages) ATMEL Corporation – 8-bit Microcontroller with 4K/8K Bytes In-System Programmable Flash

Table 2-1. User Configuration Fuses
Fuse Name
Description
Clock Source
Selects between the High Speed Crystal Oscillator, Low Speed
Crystal Oscillator, External Clock or Internal RC Oscillator for the
source of the system clock.
Start-up Time
Selects time-out delay for the POR/BOD/PWD wake-up period.
Compatibility Mode
Configures the CPU in 12-clock Compatibility mode or single-cycle
Fast mode
In-System Programming Enable
Enables or disables In-System Programming.
User Signature Programming
Enables or disables programming of User Signature array.
Tristate Ports
Configures the default port state as input-only mode (tristated) or
quasi-bidirectional mode (weakly pulled high).
In-Application Programming
Enables or disables In-Application (self) Programming
R1 Enable
2.2.2
Software Options
Table 2-2 lists some important software configuration bits that affect operation at the system
level. These can be changed by the application software but are set to their default values upon
any reset. Most peripherals also have multipe configuration bits that are not listed here.
Table 2-2. Important Software Configuration Bits
Bit(s)
SFR Location
Description
PxM0
PxM1
PMOD
Configures the I/O mode of all pins of Port x to be nput-only, quasi-
bidirectional, push-pull output or open-drain. The default state is
controlled by the Default Port State fuse above
CDV_2-0
TPS_3-0
DISALE
CLKREG.3-1
CLKREG.7-4
AUXR.0
Selects the division ratio between the oscillator and the system clock
Selects the division ratio between the system clock and the timers
Enables/disables toggling of ALE
EXRAM AUXR.1
Enables/disables access to on-chip memories that are mapped to the
external data memory address space
WS_1-0
AUXR.3-2
Selects the number of wait states when accessing external data
memory
DMEN MEMCON.3
Enables/disables access to the on-chip flash data memory
IAP
MEMCON.7
Enbles/disables the self programming feature when the fuse allows
2.3 Comparison to AT89S51/52
The AT89LP51/52 is part of a family of devices with enhanced features that are fully binary com-
patible with the 8051 instruction set. The AT89LP51/52 has two modes of operations,
Compatibility mode and Fast mode. In Compatibility mode the instruction timing, peripheral
behavior, SFR addresses, bit assignments and pin functions are identical to Atmel's existing
AT89S51/52 product. Additional enhancements are transparent to the user and can be used if
desired. Fast mode allows greater performance, but with some differences in behavior. The
major enhancements from the AT89S51/52 are outlined in the following paragraphs and may be
useful to users migrating to the AT89LP51/52 from older devices. A summary of the differences
between Compatibility and Fast modes is given in Table 2-3 on page 10. See also the Applica-
tion note “Migrating from AT89S52 to AT89LP52.”
8 AT89LP51/52 - Preliminary
3709C–MICRO–5/11