AT25FS040_07 Datasheet, PDF (8/25 Pages) ATMEL Corporation – High Speed Small Sectored SPI Flash Memory 4M (524,288 x 8)

4. Functional Description
The AT25FS040 is designed to interface directly with the synchronous serial peripheral interface
(SPI) of the 6800 type series of microcontrollers.
The AT25FS040 utilizes an 8-bit instruction register. The list of instructions and their operation
codes are contained in Table 4-1. All instructions, addresses, and data are transferred with the
MSB first and start with a high-to-low transition.
Write is defined as program and/or erase in this specification. The following commands, PRO-
GRAM, SECTOR ERASE, BLOCK ERASE, CHIP ERASE, and WRSR are write instructions for
AT25FS040.
Table 4-1. Instruction Set for the AT25FS040
Instruction Name One Byte OpCode
Operation
Binary
Hex
WREN
0000 X110 06
Set Write Enable Latch
WRDI
0000 X100 04
Reset Write Enable Latch
RDSR
0000 X101 05
Read Status Register
WRSR
0000 X001 01
Write Status Register
READ
0000 0011
03
Read Data from Memory Array
FAST READ
0000 1011
0B
Read Data from Memory Array (with
dummy cycles)
PROGRAM
0000 X010 02
Program Data Into Memory Array
0010 0000
20
SECTOR ERASE
(1)
1101 0111
D7
Erase One 4kbyte Sector in Memory Array
0101 0010
52
BLOCK ERASE(1) _{1101 1000}
D8
Erase One 64kbyte Block in Memory Array
CHIP ERASE(1)
0110 0000
60
1100 0111
C7
Erase All Memory Array
RDID(1)
1001 1111
9F
Read Manufacturer and Product ID
1010 1011
AB
Note: 1. Either one of the OP CODES will execute the instruction.
WRITE ENABLE (WREN): The device will power up in the write disable state when V_CC is
applied. All write instructions must therefore be preceded by the WREN instruction.
WRITE DISABLE (WRDI): To protect the device against inadvertent writes, the WRDI instruc-
tion disables all write commands. The WRDI instruction is independent of the status of the WP
pin.
READ STATUS REGISTER (RDSR): The RDSR instruction provides access to the status regis-
ter. The READY/BUSY and write enable status of the device can be determined by the RDSR
instruction. Similarly, the Block Write Protection bits indicate the extent of protection employed.
8 AT25FS040
5107E–SFLSH–8/07