AT24C128SC_14 Datasheet, PDF (8/13 Pages) ATMEL Corporation – Schmitt Trigger, Filtered Inputs for Noise Suppression

Device Addressing
Write Operations
The 128K/256K EEPROM requires an 8-bit device address word following a start condi-
tion to enable the chip for a read or write operation (refer to Figure 8). The device
address word consists of a mandatory one, zero sequence for the first four most signifi-
cant bits as shown. This is common to all 2-wire EEPROM devices.
The next three bits of the device address word are unused. These three unused bits
should be set to “0”.
The eighth bit of the device address is the read/write operation select bit. A read opera-
tion is initiated if this bit is high and a write operation is initiated if this bit is low.
Upon a compare of the device address, the EEPROM will output a zero. If a compare is
not made, the device will return to a standby state.
Figure 8. Device Address
1 0 1 0 0 0 0 R/W
MSB
LSB
BYTE WRITE: A write operation requires two 8-bit data word addresses following the
device address word and acknowledgment. Upon receipt of this address, the EEPROM
will again respond with a zero and then clock in the first 8-bit data word. Following
receipt of the 8-bit data word, the EEPROM will output a zero. The addressing device,
such as a microcontroller, then must terminate the write sequence with a stop condition.
At this time the EEPROM enters an internally-timed write cycle, t _WR, to the nonvolatile
memory. All inputs are disabled during this write cycle and the EEPROM will not
respond until the write is complete (refer to Figure 9).
Figure 9. Byte Write
PAGE WRITE: The 128K/256K EEPROM is capable of 64-byte page writes.
A page write is initiated the same way as a byte write, but the microcontroller does not
send a stop condition after the first data word is clocked in. Instead, after the EEPROM
acknowledges receipt of the first data word, the microcontroller can transmit up to 63
more data words. The EEPROM will respond with a zero after each data word received.
The microcontroller must terminate the page write sequence with a stop condition (refer
to Figure 10).
The data word address lower six bits are internally incremented following the receipt of
each data word. The higher data word address bits are not incremented, retaining the
memory page row location. When the word address, internally generated, reaches the
page boundary, the following byte is placed at the beginning of the same page. If more
than 64 data words are transmitted to the EEPROM, the data word address will “roll
over” and previous data will be overwritten. The address “roll over” during write is from
the last byte of the current page to the first byte of the same page.
8 AT24C128SC/AT24C256SC
1661B–SEEPR–04/04