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AT32UC3L0128 Datasheet, PDF (72/96 Pages) ATMEL Corporation – 32-bit Atmel AVR Microcontroller
AT32UC3L0128/256
TWIM and TWIS user interface registers. Please refer to the TWIM and TWIS sections for more
information.
Table 7-43. TWI-Bus Timing Requirements
Symbol
Parameter
Mode
Standard(1)
tr
TWCK and TWD rise time
Fast(1)
Standard
tf
TWCK and TWD fall time
Fast
tHD-STA
Standard
(Repeated) START hold time
Fast
tSU-STA
Standard
(Repeated) START set-up time
Fast
tSU-STO STOP set-up time
Standard
Fast
tHD-DAT
Data hold time
Standard
Fast
tSU-DAT-TWI Data set-up time
Standard
Fast
tSU-DAT
tLOW-TWI TWCK LOW period
-
Standard
Fast
tLOW
tHIGH
TWCK HIGH period
-
Standard
Fast
fTWCK
TWCK frequency
Standard
Fast
Minimum
Requirement
Device
-
20 + 0.1Cb
-
20 + 0.1Cb
4
tclkpb
0.6
4.7
tclkpb
0.6
4.0
4tclkpb
0.6
0.3(2)
250
100
-
4.7
1.3
-
4.0
0.6
2tclkpb
2tclkpb
tclkpb
4tclkpb
tclkpb
8tclkpb
-
Maximum
Requirement
Device
Unit
1000
ns
300
300
ns
300
-
μs
-
μs
3.45()
0.9()
100
400
-
μs
15tprescaled + tclkpb μs
-
ns
-
-
-
μs
-
-
-
μs
-----------1------------
kHz
12tclkpb
Notes: 1. Standard mode: fTWCK ≤ 100 kHz ; fast mode: fTWCK > 100 kHz .
2. A device must internally provide a hold time of at least 300 ns for TWD with reference to the falling edge of TWCK.
Notations:
Cb = total capacitance of one bus line in pF
tclkpb = period of TWI peripheral bus clock
tprescaled = period of TWI internal prescaled clock (see chapters on TWIM and TWIS)
The maximum tHD;DAT has only to be met if the device does not stretch the LOW period (tLOW-TWI)
of TWCK.
72
32145BS–01/2012