AT90S8535_14 Datasheet, PDF (71/127 Pages) ATMEL Corporation – Data and Nonvolatile Program Memories

ADC Noise Canceler
Function
AT90S/LS8535
Figure 48. ADC Timing Diagram, Single Conversion
One Conversion
Next Conversion
Cycle number
ADC clock
ADSC
ADIF
ADCH
ADCL
1
2
3
4
5
6
7
8
9
10 11 12 13
1
2
3
Sample & hold
MUX and REFS
update
Conversion
complete
Sign and MSB of result
LSB of result
MUX and REFS
update
Figure 49. ADC Timing Diagram, Free Running Conversion
One Conversion
Next Conversion
Cycle number ^{11 12 13 1}
2
3
4
ADC clock
ADSC
ADIF
ADCH
Sign and MSB of result
ADCL
LSB of result
Conversion
complete
Sample & hold
MUX and REFS
update
Table 26. ADC Conversion Time
Condition
Sample and Hold (Cycles
from Start of Conversion)
Extended Conversion
14
Normal Conversion
14
Conversion
Time (Cycles)
25
26
Conversion
Time (µs)
125 - 500
130 - 520
The ADC features a noise canceler that enables conversion during Idle Mode to reduce
noise induced from the CPU core. To make use of this feature, the following procedure
should be used:
1. Make sure that the ADC is enabled and is not busy converting. Single Conver-
sion Mode must be selected and the ADC conversion complete interrupt must be
enabled.
ADEN = 1
ADSC = 0
ADFR = 0
ADIE = 1
71
1041H–11/01