AT76C001 Datasheet, PDF (7/9 Pages) ATMEL Corporation – CBIC Programmable FIR Filter

AT76C001
Internal Registers (Continued)
Bit 6 = LAST_SFILT Indicates that the last sub-filter is
accessed.
Bit 7 = END_INCOEFF Indicates that the last coefficient
of the last sub-filter is being
accessed.
Bit No 7
6
5
4
3
2
1
0
Bit
END_IN LAST_S BUFF_ SING/ CFG
INT/
MSB/LSB START/
Name COEFF FILT
FULL SEQ
LOCK MOTO
STOP
Acc. R
R
R
R
R/W
R/W
R/W
R/W
Mode
Reset 1
0
1
0
0
0
1
0
Value
Filter Order Register
The filter order register is an 8 bit register mapped at ad-
dress 3h=11b. It contains the number of the order of the
filter to be implemented minus 1.
Reset Values
Bit No 7
6
5
4
3
2
1
0
Bit
Name
FILT7
FILT6
FILT5
FILT4
FILT3
FILT2
FILT1
FILT0
Acc. R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Mode
Reset 0
0
0
0
0
0
0
0
Value
Normalization and Rounding Register
The normalization and rounding register is a 5 bit regis-
ter mapped at address 2h = 10b allows the selection of
the 16 bit significant part of the internal 40 bit result; also
defines the number of bits rounding value if rounding is
desired.
Bit <3:0>= SEL <3:0>
Selects the 16 bit part and
defines the number of bits
rounding value as illustrated in
the following table:
Bit 3:0
0000
0001
0010
0011
0100
0101
0110
0111
1XXX
OUT<15:0>
RES<31:16>
RES<32:17>
RES<33:18>
RES<34:19>
RES<35:20>
RES<36:21>
RES<37:22>
RES<38:23>
RES<39:24>
Rounding Value (Hex)
00 0000 8000
00 0001 0000
00 0002 0000
00 0004 0000
00 0008 0000
00 0010 0000
00 0020 0000
00 0040 0000
00 0080 0000
Bit 4 = ROUNDEN
Enables/disables rounding of
the 40 bit result before
normalization.
Bit No
Bit Name
Access Mode
Reset Value
4
ROUNDEN
R/W
0
3
SEL3
R/W
0
2
SEL2
R/W
0
1
SEL1
R/W
0
0
SEL0
R/W
0
Coefficient Writing
Filter coefficients are stored internally by writing to ad-
dress 0hex = 00bin. The bit MSB/LSB of the configura-
tion register indicates if the MSB is sent before the LSB
and vice versa. Stored coefficients are not readable via
the microprocessor interface. For an N-tap filter, 2xN
writing is necessary. If N is not a multiple of 4, the re-
maining coefficients of the last sub-filter are set automat-
ically to zero.
Application Examples
A 4-Tap FIR Filter in Motorola Mode
Example with coefficient MSB ahead and rounding en-
abled.
yn = c0xn + c1xn-1 + c2xn-2 + c3xn-3
Where yn is the output filtered sample, c is the coeffi-
cient and x is the incoming samples.
1. Firstly, unlock the microprocessor interface by writing
a zero to bit 3 (this is normally performed by applying
a Master reset).
2. Write 1100bin in the configuration register. This sets
the configuration with bit 0 selecting stop mode, bit 1
selecting Motorola mode, bit 2 selecting MSB ahead,
and bit 3 locks the configuration.
3. Write the Filter Order-1 in the FILT_ORD register, i.e.
03hex.
4. Write the 4 coefficients starting with the Most Signifi-
cant Byte of c0, then the LSB of c0, etc.
5. Write 00010bin in the NORM register to enable round-
ing, and to select range of bits, for example bits 33
to18 of the 40 bit internal result.
6. Write 1101bin in the Configuration register to start the
filter. At each new incoming sample, XIN, specified
by a low level on DIV. The filtered sample XOUT is
calculated and is notified by a low level on DOV. The
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