AT24C32C_14 Datasheet, PDF (7/28 Pages) ATMEL Corporation – Schmitt Trigger, Filtered Inputs for Noise Suppression

5. Bus Timing
SCL: Serial Clock, SDA: Serial Data I/O
t_F
t_HIGH
SCL
t_LOW
t_LOW
SDA IN
t_SU.STA
t_HD.STA
t_HD.DAT
t_SU.DAT
t_AA
t_DH
SDA OUT
6. Write Cycle Timing
SCL: Serial Clock, SDA: Serial Data I/O
SCL
AT24C32C/64C
t_R
t_SU.STO
t_BUF
SDA
8th BIT
ACK
Note:
WORDn
STOP
CONDITION
(1)
t_wr
START
CONDITION
1. The write cycle time t_WR is the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle.
7
5298A–SEEPR–1/08