AT24C128-10PI-27 Datasheet, PDF (7/18 Pages) ATMEL Corporation – Low-voltage and Standard-voltage Operation

Bus Timing (SCL: Serial Clock, SDA: Serial Data I/O)
AT24C128/256
Write Cycle Timing (SCL: Serial Clock, SDA: Serial Data I/O)
SCL
SDA
8th BIT ^ACK
Note:
WORD n
t ⁽¹⁾
WR
STOP
CONDITION
START
CONDITION
1. The write cycle time t_WR is the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle.
7
0670E–07/01