AT83C5135_14 Datasheet, PDF (61/166 Pages) ATMEL Corporation – Integrated Power Monitor (POR/PFD) to Supervise Internal Power Supply

AT83C5134/35/36
16. Interrupt System
16.1 Overview
The AT83C5134/35/36 has a total of 11 interrupt vectors: two external interrupts (INT0 and
INT1), three timer interrupts (timers 0, 1 and 2), the serial port interrupt, SPI interrupt, Keyboard
interrupt, USB interrupt and the PCA global interrupt. These interrupts are shown in Figure 16-1.
Figure 16-1. Interrupt Control System
TCON.0
IT0 ₀
INT0
IE0
1
TF0
TCON.2
IT1 ₀
INT1
IE1
1
TF1
PCA IT
RI
TI
IPH, IPL
3
0
3
0
3
0
3
0
3
0
3
0
High priority
interrupt
Interrupt
Polling
Sequence, Decreasing From
High-to-Low Priority
TF2
3
EXF2
0
3
KBD IT
0
3
TWI IT
0
3
SPI IT
0
USBINT
3
UEPINT
0
Individual Enable
Global Disable
Low Priority
Interrupt
Each of the interrupt sources can be individually enabled or disabled by setting or clearing a bit
in the Interrupt Enable register (Table 16-2). This register also contains a global disable bit,
which must be cleared to disable all interrupts at once.
Each interrupt source can also be individually programmed to one out of four priority levels by
setting or clearing a bit in the Interrupt Priority register (Table 16-3.) and in the Interrupt Priority
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