AT86RF212_1 Datasheet, PDF (60/171 Pages) ATMEL Corporation – Low Power 700/800/900 MHz

Bit
Name
Read/Write
Reset Value
3
TRX_CMD[3]
R/W
0
2
TRX_CMD[2]
R/W
0
1
TRX_CMD[1]
R/W
0
0
TRX_CMD[0]
R/W
0
• Bit 7:5 – TRAC_STATUS
The status of the RX_AACK and TX_ARET procedure is indicated by register bits
TRAC_STATUS. Details of the algorithm and a description of the status information are
given in sections 5.2.3 and 5.2.4.
Table 5-20. TRAC_STATUS Transaction Status
Register Bits Value Description
TRAC_STATUS 0⁽¹⁾ SUCCESS
RX_AACK TX_ARET
X
X
1 SUCCESS_DATA_PENDING
X
2 SUCCESS_WAIT_FOR_ACK
X
3 CHANNEL_ACCESS_FAILURE
X
5 NO_ACK
7⁽¹⁾ INVALID
X
X
X
All other values are reserved
Note:
1. Even though the reset value for register bits TRAC_STATUS is 0, the RX_AACK
and TX_ARET procedures set the register bits to TRAC_STATUS = 7 (INVALID)
when it is started.
• Bit 4:0 – TRX_CMD
A write access to register bits TRX_CMD initiates a radio transceiver state transition:
Table 5-21. State Control Register
Register Bits
Value
State Description
TRX_CMD
0x00
0x02
NOP
TX_START
0x03
0x04⁽¹⁾
0x06
FORCE_TRX_OFF
FORCE_PLL_ON
RX_ON
0x08
0x09
TRX_OFF (CLK Mode)
PLL_ON (TX_ON)
0x16
0x19
RX_AACK_ON
TX_ARET_ON
All other values are reserved and mapped to NOP
Note:
1. FORCE_PLL_ON is not valid for states SLEEP, P_ON, RESET, TRX_OFF, and all
*_NOCLK states, as well as STATE_TRANSITION_IN_PROGRESS towards
these states.
Register 0x04 (TRX_CTRL_1):
The TRX_CTRL_1 register is a multi-purpose register to control various operating
modes and settings of the radio transceiver.
60 _AT86RF212
8168B-MCU Wireless-02/09