U4256BM-R Datasheet, PDF (6/19 Pages) ATMEL Corporation – Frequency Synthesizer for Radio Tuning

DAC 1, 2 in FM Mode
(Pin 3 and Pin 4)
The gains of DAC1 and DAC2 have a range of 0.69 × V_(PDO) to 2.16 × V_(PDO). V_(PDO) is
the PLL tuning voltage output. This range is divided into 256 steps. So one step is
approximately (2.16 - 0.46) × V_(PDO) / 255 = 0.005764 × V_(PDO). The gain of DAC1 can be
controlled by the Bits 36 to 43 (G-2⁰ to G-2⁷) and the gain of DAC2 by the Bits 0 to 7 (G-
2⁰ to G-2⁷) as following:
Gain DAC1
Decimal
Approximately B43 B42 B41 B40 B39 B38 B37 B36 Gain
Gain DAC2
Decimal
Approximately B7 B6 B5 B4 B3 B2 B1 B0
Gain
0.69 × V_(PDO)
0
0
0
0
0
0
0
0
0
0.69576 × V_(PDO) 0
0
0
0
0
0
0
1
1
0.70153 × V_(PDO) 0
0
0
0
0
0
1
0
2
0.70729 × V_(PDO) 0
0
0
0
0
0
1
1
3
...
...
...
...
...
...
...
...
...
...
0.99549 × V_(PDO) 0
0
1
1
0
1
0
1
53
...
...
...
...
...
...
...
...
...
...
2.14847 × V_(PDO) 1
1
1
1
1
1
0
1
253
2.15424 × V_(PDO) 1
1
1
1
1
1
1
0
254
2.16 × V_(PDO)
1
1
1
1
1
1
1
1
255
Offset = 31 (intermediate position)
The offset of DAC1 and DAC2 has a range of 0.56 V to -0.59 V. This range is divided
into 64 steps. So one step is approximately 1.15 V/ 63 = 18.25 mV. The offset DAC1
can be controlled by the Bits 44 to 49 (O-2⁰ to O-2⁵) and the offset of DAC2 by the Bits 8
to 13 (O-2⁰ to O-2⁵) as following:
Offset DAC1
Decimal
Approximately B49
B48
B47
B46
B45
B44
Gain
Offset DAC2
Approximately B13
B12
B11
B10
B9
Decimal
B8
Gain
0.56 V
0
0
0
0
0
0
0
0.5417 V
0
0
0
0
0
1
1
0.5235 V
0
0
0
0
1
0
2
0.5052 V
0
0
0
0
1
1
3
...
...
...
...
...
...
...
...
+0.0059 V
0
1
1
1
1
1
31
...
...
...
...
...
...
...
...
0.5535 V
1
1
1
1
0
1
61
-0.5717 V
1
1
1
1
1
0
62
-0.59 V
1
1
1
1
1
1
63
Gain = 53 (intermediate position)
6 U4256BM-R
4562C–AUDR–08/04