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U4065B Datasheet, PDF (6/34 Pages) TEMIC Semiconductors – FM Receiver
GAINIF1
IF2IN
Figure 6. Gain Control of the First IF Amplifier
17 VREF
2 kΩ
4
ESD
The gain of the first IF amplifier can be adjusted by a resistor to ground. This is useful,
for example, to compensate for the insertion loss tolerances of the ceramic BPFs. It
must be ensured that the output current of the pin does not exceed 150 µA in any case.
Linear increasing in the current out of GAINIF1 results in a linear dB increase of the gain
(0.15 dB/µA).
I4 = 0, thus, G = Gmin = 2 dB
I4 = 140 µA, thus, G = Gmax = 22 dB
Figure 7. Input of the Second IF Amplifier
VREF
5
ESD
The parallel input resistance is 330 Ω. The parallel input capacitance is about 12 pF. No
DC current is allowed. To avoid overload of this stage, an internal detector watches the
input level and causes current at the AGCOUT pin.
6 U4065B
4807A–AUDR–05/04