TH7888A Datasheet, PDF (6/21 Pages) ATMEL Corporation – Area Array CCD Image Sensor (1024 x 1024 Pixels with Antiblooming)

Operating Conditions
Table 2. DC Characteristics
Value
Parameter
Symbol
Min
Typ
Max
Unit
Output amplifier drain supply
VDD1, VDD2
14.5
15
15.5
V
Protection drain bias
VDP
14.5
15
15.5
V
Reset bias
VDR
14.5
15
15.5
V
Antiblooming diode bias
VA
14.5
15
15.5
V
Register output gate bias
VGS
2.2
2.5
2.8
V
Output amplifier source supply
VS1⁽²⁾, VS2
0
V
Ground⁽¹⁾
VSS⁽²⁾
0
V
Notes:
1. Ground: note that the package metal back is grounded.
2. In dynamic mode, to avoid possible damage to the device, the addition of a Schottky diode is recommended (for example;
diode reference BAR 43S) between VS1 and VSS ground in order to increase the potential on VS1, thus avoiding any direct
mode diode current during clock transitions.
Readout Mode
Table 3. Readout Modes
Readout Modes
Drive Clocks (Signals)
ΦL1
ΦL2
The serial readout register is operated in a two-phase transfer mode. However, there
are 6 separate command electrodes that should be connected differently, depending on
the required readout mode. The following table gives the connections to be made for
each mode.
1 Output, VOS 1
Pins B2, B3, B1
Pins A2, A3, A1
1 Output, VOS2
(Mirror Effect)
Pins B2, A3, A1
Pins A2, B3, B1
2 Outputs (Parallel)
Pins B2, B3, A1
Pins A2, A3, B1
Table 4. Timing Parameters
Definition
Vertical transfer period
Vertical transfer subdivision
Rise time
Fall time
Readout register clock transition time
Reset clock transition time
Delay between output reset signal and reset clock
Symbol
T_V
T_O
tr
tf
t1
t2
td
Comments
Nominal value = 800 nm
Tv = 8 x To
For vertical transfer clocks (between
10% and 90% of the transition time)
6 TH7888A
1999A–IMAGE–09/03