AT88SA102S_11 Datasheet, PDF (6/26 Pages) ATMEL Corporation – Atmel CryptoAuthentication Product Authentication Chip

2. IO Protocol
Communications to and from the AT88SA102S take place over a single asynchronously timed wire using a pulse count
scheme. The overall communications structure is a hierarchy:
Table 2-1. IO Hierarchy
Tokens
Flags
Blocks
Packets
Implement a single data bit transmitted on the bus, or the wake-up event.
Comprised of eight tokens (bits) which convey the direction and meaning of the next group of bits (if any)
which may be transmitted.
Of data follow the command and Transmit flags. They incorporate both a byte count and a checksum to
ensure proper data transmission.
Of bytes form the core of the block without the count and CRC. They are either the input or output parameters
of an Atmel AT88SA102S command or status information from the Atmel AT88SA102S.
See applications notes on the Atmel website for more details on how to use any microprocessor to easily generate the
signaling necessary to send these values to the chip.
2.1 IO Tokens
There are a number of IO tokens that may be transmitted along the bus:
Input: (To AT88SA102S)
Wake Wake AT88SA102S up from sleep (low power) state
Zero
Send a single bit from system to AT88SA102S with a value of zero
One
Send a single bit from system to AT88SA102S with a value of one
Output: (From AT88SA102S)
ZeroOut Send a single bit from AT88SA102S to the system with a value of zero
OneOut Send a single bit from AT88SA102S to the system with a value of one
The waveforms are the same in either direction, however there are some differences in timing based on the expectation that
the host has a very accurate and consistent clock while AT88SA102S has significant part to part variability in its internal clock
generator due to normal manufacturing and environmental fluctuations.
The bit timings are designed to permit a standard UART running at 230.4K baud to transmit and receive the tokens efficiently.
Each byte transmitted or received by the UART corresponds to a single bit received or transmitted by AT88SA102S. See
applications notes on the Atmel website for more details.
Atmel AT88SA102S [DATASHEET]
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8584G−CRYPTO−9/11