ATMEGA325P_1 Datasheet, PDF (56/364 Pages) ATMEL Corporation – 8-bit Microcontroller with 32K Bytes In-System Programmable Flash

11.2.1
Address Labels Code
Comments
;
.org 0x3800/0x7800
0x3800/0x7800 jmp
0x3802/0x7802 jmp
RESET
EXT_INT0
; Reset handler
; IRQ0 Handler
0x3804/0x7804 jmp PCINT0
; PCINT0 Handler
...
... ...
;
0x382C/0x782C jmp SPM_RDY ; Store Program Memory Ready Handler
;
0x382E/0x782ERESET:ldir16,high(RAMEND); Main program start
0x382F/0x782F out SPH,r16
; Set Stack Pointer to top of RAM
0x3830/0x7830 ldi r16,low(RAMEND)
0x3831/0x7831 out
0x3832/0x7832 sei
SPL,r16
; Enable interrupts
0x3833/0x7833 <instr> xxx
Moving Interrupts Between Application and Boot Space
The MCU Control Register controls the placement of the Interrupt Vector table.
11.3 Register Description
11.3.1 MCUCR – MCU Control Register
Bit
7
6
5
4
3
0x35 (0x55)
JTD
BODS BODSE
PUD
–
Read/Write
R/W
R
R
R/W
R
Initial Value
0
0
0
0
0
2
1
0
–
IVSEL
IVCE
MCUCR
R
R/W
R/W
0
0
0
• Bit 1 – IVSEL: Interrupt Vector Select
When the IVSEL bit is cleared (zero), the Interrupt Vectors are placed at the start of the Flash
memory. When this bit is set (one), the Interrupt Vectors are moved to the beginning of the Boot
Loader section of the Flash. The actual address of the start of the Boot Flash Section is deter-
mined by the BOOTSZ Fuses. Refer to the section ”Boot Loader Support – Read-While-Write
Self-Programming” on page 256 for details. To avoid unintentional changes of Interrupt Vector
tables, a special write procedure must be followed to change the IVSEL bit:
1. Write the Interrupt Vector Change Enable (IVCE) bit to one.
2. Within four cycles, write the desired value to IVSEL while writing a zero to IVCE.
Interrupts will automatically be disabled while this sequence is executed. Interrupts are disabled
in the cycle IVCE is set, and they remain disabled until after the instruction following the write to
IVSEL. If IVSEL is not written, interrupts remain disabled for four cycles. The I-bit in the Status
Register is unaffected by the automatic disabling.
Note:
If Interrupt Vectors are placed in the Boot Loader section and Boot Lock bit BLB02 is programmed,
interrupts are disabled while executing from the Application section. If Interrupt Vectors are placed
in the Application section and Boot Lock bit BLB12 is programed, interrupts are disabled while
executing from the Boot Loader section. Refer to the section ”Boot Loader Support – Read-While-
Write Self-Programming” on page 256 for details on Boot Lock bits.
56 ATmega325P/3250P
8023F–AVR–07/09