ATTINY88-AU Datasheet, PDF (53/302 Pages) ATMEL Corporation – 8-bit Microcontroller with 4/8K Bytes In-System Programmable Flash

ATtiny48/88
A typical and general setup for interrupt vector addresses in ATtiny48/88 is shown in the pro-
gram example below.
Assembly Code Example
.org 0x0000
;Set address of next statement
rjmp RESET
rjmp INT0_ISR
rjmp INT1_ISR
rjmp PCINT0_ISR
rjmp PCINT1_ISR
rjmp PCINT2_ISR
rjmp PCINT3_ISR
rjmp WDT_ISR
rjmp TIM1_CAPT_ISR
rjmp TIM1_COMPA_ISR
rjmp TIM1_COMPB_ISR
rjmp TIM1_OVF_ISR
rjmp TIM0_COMPA_ISR
rjmp TIM0_COMPB_ISR
rjmp TIM0_OVF_ISR
rjmp SPI_STC_ISR
rjmp ADC_ISR
rjmp EE_RDY_ISR
rjmp ANA_COMP_ISR
rjmp TWI_ISR
; Address 0x0000
; Address 0x0001
; Address 0x0002
; Address 0x0003
; Address 0x0004
; Address 0x0005
; Address 0x0006
; Address 0x0007
; Address 0x0008
; Address 0x0009
; Address 0x000A
; Address 0x000B
; Address 0x000C
; Address 0x000D
; Address 0x000E
; Address 0x000F
; Address 0x0010
; Address 0x0011
; Address 0x0012
; Address 0x0013
RESET:
<instr>
...
Note: See “About Code Examples” on page 7.
; Main program start
; Address 0x0038
9.2 External Interrupts
The External Interrupts are triggered by the INT0 and INT1 pins or any of the PCINT[27:0] pins.
Observe that, if enabled, the interrupts will trigger even if the INT0 and INT1 or PCINT[27:0] pins
are configured as outputs. This feature provides a way of generating a software interrupt, as
follows.
• Pin Change Interrupt PCI3 triggers if a pin in PCINT[27:24] is toggled while enabled
• Pin Change Interrupt PCI2 triggers if a pin in PCINT[23:16] is toggled while enabled
• Pin Change Interrupt PCI1 triggers if a pin in PCINT[15:8] is toggled while enabled
• Pin Change Interrupt PCI0 triggers if a pin in PCINT[7:0] is toggled while enabled
The PCMSK3, PCMSK2, PCMSK1 and PCMSK0 registers control which pins contribute to the
pin change interrupts. Pin change interrupts on PCINT[27:0] are detected asynchronously. This
53
8008H–AVR–04/11