AT76C551 Datasheet, PDF (53/77 Pages) ATMEL Corporation – Single Chip Bluetooth™ Controller

1612D–08/01
AT76C551
• Bit 6 – INTER_LINE
The INTERRUPT line from the USB protocol handler is asserted.
• Bits 5..2 – Reserved
• Bit 1 – SUSP
When this bit is high, the USB has entered the suspend state.
• Bit 0 – RSM
When this bit is high, the USB has entered the resume state.
Note: Default: 00h
RES_STAT: Reset Status
addr 500000Ch
R/W
• Bits 7..5 – Reserved
• Bit 4 – USB_RES
8 bits
Set when USB module enters reset state.
• Bits 3..0 – Reserved
Note: Default: 00h
DEF_EP_PAIRS: Endpoint Pairs Definition
addr 5000010h
R/W
8 bits
• Bits 7...4 – Reserved
• Bit 3 – EP3_EN_PAIR
When this bit is high, the EP3 supports an OUT and an IN endpoint. In this case the EP6 is used as the
IN endpoint.
• Bit 2 – EP2_EN_PAIR
When this bit is high, the EP2 supports an OUT and an IN endpoint. In this case the EP5 is used as the
IN endpoint.
• Bit 1 – EP1_EN_PAIR
When this bit is high, the EP1 supports an OUT and an IN endpoint. In this case the EP4 is used as the
IN endpoint
• Bit 0 – Reserved
Note: Default: 00h
This 3-bit register defines which endpoints support both IN and OUT connections. Only the
endpoints 1 - 3 support endpoint pair addressing. There is a correspondence between end-
points 1 to 3 and endpoints 4 to 6, e.g. endpoint 1 pair addressing is enabled, endpoint 4
becomes the pair endpoint. In this case, the endpoint 1 should be configured as an OUT end-
point, while endpoint 4 is an IN endpoint.
This correspondence is transparent to the USB host which considers that there are two end-
points at address 0x01, an OUT.
USB_RDMA_LEN: Receive DMA Packet Length Requested
addr 500001Ch
R/W
16 bits
• Bits 15..9 – Reserved
• Bits 8..0 – URDL[8:0]: USB Receive DMA Length
Note: Default: 00h
ARM programs this register with the number of bytes to be transferred during the next DMA.
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