English
Language : 

U4311B-FS Datasheet, PDF (5/13 Pages) ATMEL Corporation – Low-Current Superhet Remote Control Receiver
U4311B-FS
Circuit Description
General Functions
The integrated circuit U4311B-FS includes the following
functions: IF amplifier, FM demodulator, wake-up circuit
with monoflop, operational amplifier, non-inverting data
comparator and voltage regulator.
The 10.7-MHz IF signal from the front end passes the
integrated IF amplifier which operates for amplitude- or
frequency-modulated signals to either a logarithmic AM
demodulator which was implemented to avoid settling-
time problems effected by use of an automatic gain
control system or a quadrature detector for FM. A data-
shaping filter * advantageously realized with the
internal high-performance operational amplifier *
reduces system bandwidth to an optimized compromise
regarding transmission distance and data recognition.
Thus, an optimal bit-error rate can be achieved without
any further active component.
The comparator connected to the output of the filter has
a level-dependent hysteresis and clamps its reference
voltage to the signal’s minimum and maximum peaks as
described later.
Without IF-input signal * in normal mode * only the IF
amplifier and the AM demodulator which operates as a
level-strength indicator are activated. If the level of the IF
signal increases, the entire circuitry is turned on by the
wake-up circuit. This signal is externally available at
Pin 13 and can be used to wake up a microcontroller.
After an adjustable reset time, determined by the mono-
flop time constant, the integrated circuit returns to sleep
mode. In this case, typically 1-mA supply current is re-
quired. An external resistor matched at Pin 3 to ground
blocks the wake-up circuit and enables the complete func-
tionally at lower IF level as can be seen in figures 24
and 27, but supply current increases up to typically
2.8 mA.
Function of the Clamping Comparator
The output signal of the operational amplifier is fed to the
input of the non-inverting comparator and two peak
detectors (Q1 and Q2, figure 3). Their time constants are
distinguished by RC+ and RC–. The component’s value
must be adapted to the transmission code. The time
constant should be large compared to the bit rate for opti-
mized noise and hum suppression. To compensate the
input transistor’s base-emitter-voltage differences, these
two signals are buffered by Q3 and Q4. The mean value
is used as comparator threshold, the difference of the peak
values controls the hysteresis. This clamping comparator
operates as a data regenerator.
VRef
1
2
3
4
5
6
7
8
9
10
12650
Q1
Q3
Op. amp.
+–
to Pin 20
Comparator
Hysteresis
Comp. threshold
Figure 3. Principle function of the clamping comparator
Q4
Q2
Rev. A3, 28-Sep-00
5 (13)