AT25040A_14 Datasheet, PDF (5/18 Pages) ATMEL Corporation – Low-voltageandStandard-voltageOperation

AT25010A/020A/040A/080A
CHIP SELECT: The AT25010A/020A/040A is selected when the CS pin is low. When the device
is not selected, data will not be accepted via the SI pin, and the serial output pin (SO) will remain
in a high impedance state.
HOLD: The HOLD pin is used in conjunction with the CS pin to select the
AT25010A/020A/040A. When the device is selected and a serial sequence is underway, HOLD
can be used to pause the serial communication with the master device without resetting the
serial sequence. To pause, the HOLD pin must be brought low while the SCK pin is low. To
resume serial communication, the HOLD pin is brought high while the SCK pin is low (SCK may
still toggle during HOLD). Inputs to the SI pin will be ignored while the SO pin is in the high
impedance state.
WRITE PROTECT: The write protect pin (WP) will allow normal read/write operations when held
high. When the WP pin is brought low, all write operations are inhibited. WP going low while CS
is still low will interrupt a write to the AT25010A/020A/040A. If the internal write cycle has
already been initiated, WP going low will have no effect on any write operation.
Figure 4-1. SPI Serial Interface
AT25010A/020A/040A
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