AT89C5132_06 Datasheet, PDF (47/181 Pages) ATMEL Corporation – USB Microcontroller with 64K Bytes Flash Memory

AT89C5132
11.4.1
Entering Power-down Mode
To enter Power-down mode, set PD bit in PCON register. The AT89C5132 enters the Power-
down mode upon execution of the instruction that sets PD bit. The instruction that sets PD bit is
the last instruction executed.
11.4.2
Exiting Power-down Mode
If V_DD was reduced during the Power-down mode, do not exit Power-down mode until V_DD is
restored to the normal operating level.
There are 2 ways to exit the Power-down mode:
1. Generate an enabled external interrupt.
– The AT89C5132 provides capability to exit from Power-down using INT0, INT1, and
KIN3:0 inputs. In addition, using KIN input provides high or low level exit capability
(see Section “Keyboard Interface”, page 181).
Hardware clears PD bit in PCON register which starts the oscillator and restores the
clocks to the CPU and peripherals. Using INTn input, execution resumes when the
input is released (see Figure 11-3) while using KINx input, execution resumes after
counting 1024 clock ensuring the oscillator is restarted properly (see Figure 11-4).
This behavior is necessary for decoding the key while it is still pressed. In both
cases, execution resumes with the interrupt service routine. Upon completion of the
interrupt service routine, program execution resumes with the instruction
immediately following the instruction that activated Power-down mode.
Note:
1. The external interrupt used to exit Power-down mode must be configured as level sensitive
(INT0 and INT1) and must be assigned the highest priority. In addition, the duration of the
interrupt must be long enough to allow the oscillator to stabilize. The execution will only
resume when the interrupt is deasserted.
2. Exit from power-down by external interrupt does not affect the SFRs nor the internal RAM
content.
Figure 11-3. Power-down Exit Waveform Using INT1:0
INT1:0
OSC
Active phase
Power-down Phase
Oscillator Restart
Active Phase
Figure 11-4. Power-down Exit Waveform Using KIN3:0
KIN3:0¹
OSC
Active phase
Power-down
Note: 1. KIN3:0 can be high or low-level triggered.
2. Generate a reset.
1024 clock count
Active phase
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