AT91SAM7L128PRE Datasheet, PDF(469/564 Page) ATMEL Corporation – numberHigh-performance 32-bit RISC Architecture

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

AT91SAM7L128PRE Datasheet, PDF (469/564 Pages) ATMEL Corporation – numberHigh-performance 32-bit RISC Architecture

◁

AT91SAM7L128/64 Preliminary

32.6.8 PWM Interrupt Status Register

Register Name:

PWM_ISR

Access Type:

Read-only

31

30

29

28

27

26

25

-

-

-

-

-

-

-

23

22

21

20

19

18

17

-

-

-

-

-

-

-

15

14

13

12

11

10

9

-

-

-

-

-

-

-

7

6

5

4

3

2

1

-

-

-

-

CHID3

CHID2

CHID1

â¢ CHIDx: Channel ID

0 = No new channel period has been achieved since the last read of the PWM_ISR register.

1 = At least one new channel period has been achieved since the last read of the PWM_ISR register.

24

-

16

-

8

-

0

CHID0

Note: Reading PWM_ISR automatically clears CHIDx flags.

6257AâATARMâ20-Feb-08

469

▷