ATAM894 Datasheet, PDF (45/97 Pages) ATMEL Corporation – 8k-flash Microcontroller

6.3.2.9
Timer 2 Mode Register 2 (T2M2)
ATAM894
T2M2
Bit 3
T2TOP
Bit 2
T2OS2
Bit 1
T2OS1
Bit 0
T2OS0
Address: '7'hex — Subaddress: '2'hex
Reset value: 1111b
T2TOP
T2OS2
T2OS1
T2OS0
Timer 2 Toggle Output Preset
This bit allows the programmer to preset the Timer 2 output T2O.
T2TOP = 0, resets the toggle outputs with the write cycle (M2 = 0)
T2TOP = 1, sets toggle outputs with the write cycle (M2 = 1)
Note: If T2R = 1, no output preset is possible
Timer 2 Output Select bit 2
Timer 2 Output Select bit 1
Timer 2 Output Select bit 0
6.3.2.10
Table 6-11. Timer 2 Output Select Bits
Output
Mode
1
2
3
4
5
6
7
8
T2OS2
1
1
1
1
0
0
0
0
T2OS1
1
1
0
0
1
1
0
0
T2OS0
1
0
1
0
1
0
1
0
Clock Output
Toggle mode: a Timer 2 compare match toggles
the output flip-flop (M2) →T2O
Duty cycle burst generator 1: the DCG output
signal (DCG0) is given to the output and gated by
the output flip-flop (M2)
Duty cycle burst generator 2: the DCG output
signal (DCGO) is given to the output and gated
by the SSI internal data output (SO)
Bi-phase modulator: Timer 2 modulates the SSI
internal data output (SO) to
Bi-phase code
Manchester modulator: Timer 2 modulates the
SSI internal data output (SO) to Manchester code
SSI output: T2O is used directly as SSI internal
data output (SO)
PWM mode: an 8/12-bit PWM mode
Not allowed
If one of these output modes is used the T2O alternate function of Port 4 must also be activated.
Timer 2 Compare and Compare Mode Registers
Timer 2 has two separate compare registers, T2CO1 for the 4-bit stage and T2CO2 for the 8-bit
stage of Timer 2. The timer compares the contents of the compare register current counter value
and if it matches it generates an output signal. Depending on the timer mode, this signal is used
to generate a timer interrupt, to toggle the output flip-flop as SSI clock or as a clock for the next
counter stage.
In the 12-bit timer mode, T2CO1 contains bits 0 to 3 and T2CO2 bits 4 to 11 of the 12-bit com-
pare value. In all other modes, the two compare registers work independently as a 4- and 8-bit
compare register. When assigned to the compare register a compare event will be suppressed.
45
4679D–4BMCU–05/05