ATMEGA128RFA1_12 Datasheet, PDF (43/568 Pages) ATMEL Corporation – Microcontroller with Low Power 2.4GHz Transceiver for ZigBee and IEEE 802.15.4

ATmega128RFA1
If the radio transceiver was in SLEEP state, the SLPTR bit in the TRXPR register must
be cleared prior to clearing the TRXRST bit in order to enter the TRX_OFF state.
Otherwise the radio transceiver enters the SLEEP state immediately.
If the radio transceiver was in SLEEP state and the Transceiver Clock is not selected as
the microcontroller clock source, the XOSC is enabled before entering TRX_OFF state.
If register TRX_STATUS indicates STATE_TRANSITION_IN_PROGRESS during
system initialization until the radio transceiver reaches TRX_OFF, do not try to initiate a
further state change while the radio transceiver is in this state.
Note that before accessing the radio transceiver module the TRX24_AWAKE event
should be checked.
9.4.1.4.5 State Transition Timing Summary
The transition numbers correspond to Table 9-3 below. See measurement setup in
"Basic Application Schematic" on page 499.
Table 9-3. Radio Transceiver State Transition Timing
No Symbol
Transition
Time [µs], (typ)
1
tTR2 SLEEP
2
tTR3 TRX_OFF
3
tTR4 TRX_OFF
4
tTR5 PLL_ON
5
tTR6 TRX_OFF
6
tTR7 RX_ON
7
tTR8 PLL_ON
8
tTR9 RX_ON
TRX_OFF
SLEEP
PLL_ON
TRX_OFF
RX_ON
TRX_OFF
RX_ON
PLL_ON
240
35 · 1 / fCLKM
110
1
110
1
1
1
9
tTR10 PLL_ON
BUSY_TX
16
10
tTR11 BUSY_TX
PLL_ON
32
11
tTR12 All modes
TRX_OFF
1
12
tTR13 RESET
TRX_OFF
37
13
tTR14
Various
states
PLL_ON
1
Comments
Depends on crystal oscillator setup (CL = 10 pf)
TRX_OFF state indicated by TRX24_AWAKE interrupt
For fCLKM > 250 kHz
Depends on external capacitor at AVDD (1 µF nom)
Depends on external capacitor at AVDD (1 µF nom)
Transition time is also valid for TX_ARET_ON, RX_AACK_ON
When setting bit SLPTR or TRX_CMD = TX_START, the first
symbol transmission is delayed by 16 µs (PLL settling and
PA ramp up).
PLL settling time from TX_BUSY to PLL_ON state
Using TRX_CMD = FORCE_TRX_OFF (see register
TRX_STATE),
Not valid for SLEEP state
Not valid for SLEEP state
Using TRX_CMD = FORCE_PLL_ON (see register
TRX_STATE),
Not valid for SLEEP, RESET and TRX_OFF
The state transition timing is calculated based on the timing of the individual blocks
shown in Table 9-8 on page 53. The worst case values include maximum operating
temperature, minimum supply voltage, and device parameter variations.
Table 9-8. Analog Block Initialization and Settling Time
No Symbol Block
Time [µs], (typ) Time [µs], (max) Comments
15
tTR15 XOSC
215
1000
Leaving SLEEP state, depends on crystal Q factor and load
capacitor
16
tTR16 FTN
25
FTN tuning time, fixed
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8266D-MCU Wireless-06/12