AT90S1200_02 Datasheet, PDF (43/71 Pages) ATMEL Corporation – 8-bit Microcontroller with 1K Byte of In-System Programmable Flash

AT90S1200
Reading the Signature Bytes
The algorithm for reading the signature bytes is as follows (refer to “Programming the
Flash” on page 39 for details on command and address loading):
1. A: Load Command “0000 1000”.
2. C: Load Address Low Byte ($00 - $02).
Set OE to “0”, and BS to “0”. The selected signature byte can now be read at DATA.
Set OE to “1”.
Parallel Programming
Characteristics
Figure 33. Parallel Programming Timing
XTAL1
t_XHXL
t_XLWL
Data & Contol
(DATA, XA0/1, BS)
t_DVXH
t_XLDX t_BVWL
t_WLWH
WR
RDY/BSY
t_WHRL
OE
DATA
t_XLOL
t_OLDV
t_RHBX
t_WLRH
t_OHDZ
Table 17. Parallel Programming Characteristics, T_A = 25°C ± 10%, V_CC = 5V ± 10%
Symbol Parameter
Min Typ Max Units
V_PP
Programming Enable Voltage
11.5
12.5 V
I_PP
Programming Enable Current
250.0 µA
t_DVXH
Data and Control Setup before XTAL1 High
67.0
ns
t_XHXL
XTAL1 Pulse Width High
67.0
ns
t_XLDX
Data and Control Hold after XTAL1 Low
67.0
ns
t_XLWL
XTAL1 Low to WR Low
67.0
ns
t_BVWL
BS Valid to WR Low
67.0
ns
t_RHBX
t_WLWH
t_WHRL
t_WLRH
BS Hold after RDY/BSY High
WR Pulse Width Low⁽¹⁾
WR High to RDY/BSY Low⁽²⁾
WR Low to RDY/BSY High⁽²⁾
67.0
ns
67.0
ns
20.0
ns
0.5 0.7 0.9 ms
t_XLOL
XTAL1 Low to OE Low
67.0
ns
t_OLDV
OE Low to DATA Valid
20.0
ns
t_OHDZ
OE High to DATA Tri-stated
20.0 ns
t_{WLWH_CE} WR Pulse Width Low for Chip Erase
5.0 10.0 15.0 ms
t_{WLWH_PFB} WR Pulse Width Low for Programming the Fuse 1.0 1.5 1.8
ms
Bits
Notes: 1. Use t_{WLWH_CE} for chip erase and t_{WLWH_PFB} for programming the Fuse bits.
2. If t_WLWH is held longer than t_WLRH, no RDY/BSY pulse will be seen.
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0838H–AVR–03/02