ATAR862-3 Datasheet, PDF (42/105 Pages) ATMEL Corporation – Microcontroller with UHF ASK/FSK Transmitter

Timer 1 Control Register 1
(T1C1)
Bit 3 *
Bit 2
Bit 1
T1RM
T1C2
T1C1
* Bit 3 -> MSB, Bit 0 -> LSB
Bit 0
T1C0
Address: "7"hex - Subaddress: "8"hex
Reset value: 1111b
T1RM
T1C2
T1C1
T1C0
Timer 1 Restart Mode T1RM = 0, write access without Timer 1 restart
T1RM = 1, write access with Timer 1 restart
Note: If WDL = 0, Timer 1 restart is impossible
Timer 1 Control bit 2
Timer 1 Control bit 1
Timer 1 Control bit 0
The three bits T1C[2:0] select the divider for timer 1. The resulting time interval depends
on this divider and the timer 1 input clock source. The timer input can be supplied by the
system clock, the 32-kHz oscillator or via the clock management. If the clock manage-
ment generates the SUBCL, the selected input clock from the RC oscillator, 4-MHz
oscillator or an external clock is divided by 16.
T1C2
0
0
0
0
1
1
1
1
T1C1
0
0
1
1
0
0
1
1
T1C0
0
1
0
1
0
1
0
1
Divider
2
4
8
16
32
256
2048
16384
Time Interval with
SUBCL
SUBCL/2
SUBCL/4
SUBCL/8
SUBCL/16
SUBCL/32
SUBCL/256
SUBCL/2048
SUBCL/16384
Time Interval with
SUBCL = 32 kHz
61 µs
122 µs
244 µs
488 µs
0.977 ms
7.812 ms
62.5 ms
500 ms
Time Interval with
SYSCL = 2/1 MHz
1 µs/2 µs
2 µs/4 µs
4 µs/8 µs
8 µs/16 µs
16 µs/32 µs
128 µs/256 µs
1024 µs/2048 µs
8192 µs/16384 µs
42 ATAR862-3
4556B–4BMCU–02/03