AT73C224-C_14 Datasheet, PDF (41/75 Pages) ATMEL Corporation – Ultra-low Power Real-time Clock (RTC) and Backup Battery Management

AT73C224
6.3.3 Interrupt Mask Register
Register Name:
IRQ_MSK
Access Type:
Read-only
Address:
0x32
7
6
5
4
3
2
1
0
ALL
–
DC2
DC1
–
PWR
PB
RTC
0
0
0
0
0
0
0
0
This register summarizes the result of the successive interrupt enable/disable commands performed by writing into
IRQ_EN/IRQ_DIS.
• RTC:
0: the RTC interrupt is masked.
1: the RTC interrupt is unmasked.
• PB:
0: the push-button interrupt is masked.
1: the push-button interrupt is unmasked.
• PWR:
0: the power failure interrupt is masked.
1: the power failure interrupt is unmasked.
• DC1:
0: the BOOST/SEPIC1 interrupt is masked.
1: the BOOST/SEPIC1 interrupt is unmasked.
• DC2:
0: the BUCK2 interrupt is masked.
1: the BUCK2 interrupt is unmasked.
• ALL:
0: the interrupt sources are globally masked.
1: the interrupt sources are globally unmasked.
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6266A–PMAAC–08-Sep-08