SAM7L128_14 Datasheet, PDF (405/549 Pages) ATMEL Corporation – AT91SAM ARM-based Flash MCU

30.7.15 USART Manchester Configuration Register
Name:
US_MAN
Access Type:
Read-write
31
30
29
28
27
26
25
24
–
DRIFT
1
RX_MPOL
–
–
RX_PP
23
22
21
20
19
18
17
16
–
–
–
–
RX_PL
15
14
13
12
11
10
–
–
–
TX_MPOL
–
–
9
8
TX_PP
7
6
5
4
3
2
1
0
–
–
–
–
TX_PL
• TX_PL: Transmitter Preamble Length
0: The Transmitter Preamble pattern generation is disabled
1 - 15: The Preamble Length is TX_PL x Bit Period
• TX_PP: Transmitter Preamble Pattern
TX_PP
0
0
0
1
1
0
1
1
Preamble Pattern default polarity assumed (TX_MPOL field not set)
ALL_ONE
ALL_ZERO
ZERO_ONE
ONE_ZERO
• TX_MPOL: Transmitter Manchester Polarity
0: Logic Zero is coded as a zero-to-one transition, Logic One is coded as a one-to-zero transition.
1: Logic Zero is coded as a one-to-zero transition, Logic One is coded as a zero-to-one transition.
• RX_PL: Receiver Preamble Length
0: The receiver preamble pattern detection is disabled
1 - 15: The detected preamble length is RX_PL x Bit Period
• RX_PP: Receiver Preamble Pattern Detected
RX_PP
0
0
0
1
1
0
1
1
Preamble Pattern default polarity assumed (RX_MPOL field not set)
ALL_ONE
ALL_ZERO
ZERO_ONE
ONE_ZERO
SAM7L128/64 [DATASHEET]
6257B–ATARM–01-Feb-13
405