AT45DB041D_07 Datasheet, PDF (38/53 Pages) ATMEL Corporation – 4-megabit 2.5-volt or 2.7-volt DataFlash

21.6 Reset Timing
CS
SCK
RESET
SO (OUTPUT)
HIGH IMPEDANCE
tREC
tRST
tCSS
HIGH IMPEDANCE
SI (INPUT)
Note: The CS signal should be in the high state before the RESET signal is deasserted.
21.7 Command Sequence for Read/Write Operations for Page Size 256 Bytes (Except Status
Register Read, Manufacturer and Device ID Read)
SI (INPUT)
CMD 8 bits 8 bits 8 bits
MSB
XXXXX XXX XXXX XXXX XXXX XXXX
LSB
5 Don’t Care
Bits
Page Address
(A18 - A8)
Byte/Buffer Address
(A7 - A0/BFA7 - BFA0)
21.8 Command Sequence for Read/Write Operations for Page Size 264 Bytes (Except Status
Register Read, Manufacturer and Device ID Read)
SI (INPUT)
CMD 8 bits 8 bits 8 bits
MSB
XXXX X XXXX XXXX XX X XXXX XXXX
LSB
4 Don’t Care _{Page Address}
Bits
(PA10 - PA0)
Byte/Buffer Address
(BA8 - BA0/BFA8 - BFA0)
38 AT45DB041D
3595H–DFLASH–03/07