AT73C224-H_14 Datasheet, PDF (37/75 Pages) ATMEL Corporation – Ultra-low Power Real-time Clock (RTC) and Backup Battery Management

AT73C224
6.2.16 PMU Interrupt Disable Register
Register Name:
PMU_IDR
Access Type:
Write-only
Address:
0x1F
7
6
5
4
3
2
1
0
–
–
PF2
PG2
–
PF1
PG1
SHORT1
–
–
–
–
–
A minimum of 3 clock cycles of 15 kHz clock must be waited after any write operation before doing a new register access.
• SHORT1:
0: no effect.
1: the overcurrent detection interrupt on BOOST/SEPIC1 is disabled.
• PG1:
0: no effect.
1: the power good interrupt of BOOST/SEPIC1 is disabled.
• PF1:
0: no effect.
1: the power fail interrupt of BOOST/SEPIC1 is disabled.
• PG2:
0: no effect.
1: the power good interrupt of BUCK2 is disabled.
• PF2:
0: no effect.
1: the power fail interrupt of BUCK2 is disabled.
37
6266A–PMAAC–08-Sep-08