AT91SAM9M11 Datasheet, PDF (35/57 Pages) ATMEL Corporation – AT91 ARM Thumb-based Microcontrollers

AT91SAM9M11
Figure 8-4. AT91SAM9M11 Power Management Controller Block Diagram
PLLACK
/1,/2
USBS
USBDIV+1
UHP48M
USB
OHCI
UHP12M
/4
USB
EHCI
UPLLCK
MAINCK
SLCK
Divider
Prescaler
/1,/2,/4,.../64
X /1 /1.5 /2
/1 /2 /3 /4
Master Clock Controller
Processor
Clock
Controller
PCK
int
Peripherals
Clock Controller
ON/OFF
SysClk DDR
MCK
periph_clk[..]
SLCK
MAINCK
UPLLCK
ON/OFF
Prescaler
/1,/2,/4,...,/64
Programmable Clock Controller
pck[..]
8.7.1
Main Application Modes
The Power Management Controller provides 3 main application modes.
8.7.1.1
Normal Mode
• PLLA and UPLL are running respectively at 400 MHz and 480 MHz
• USB Device High Speed and Host EHCI High Speed operations are allowed
• Full Speed OHCI input clock is UPLLCK, USBDIV is 9 (division by 10)
• System Input clock is PLLACK, PCK is 400 MHz
• MDIV is ‘11’, MCK is 133 MHz
• DDR2 can be used at up to 133 MHz
8.7.1.2
USB HS and LP-DDR Mode
• Only UPLL is running at 480 MHz, PLLA power consumption is saved
• USB Device High Speed and Host EHCI High Speed operations are allowed
• Full Speed OHCI input clock is UPLLCK, USBDIV is 9 (division by 10)
• System Input clock is UPLLCK, Prescaler is 2, PCK is 240 MHz
• MDIV is ‘01’, MCK is 120 MHz
• Only LP-DDR can be used at up to 120 MHz
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6437BS–ATARM–26-Apr-10