ATMEGA165V_09 Datasheet, PDF (34/336 Pages) ATMEL Corporation – 8-bit Microcontroller with 16K Bytes In-System Programmable Flash

ATmega165/V
Oscillator is stopped during sleep. If the Timer/Counter2 is using the synchronous clock,
the clock source is stopped during sleep. Note that even if the synchronous clock is run-
ning in Power-save, this clock is only available for the Timer/Counter2.
Standby Mode
When the SM2..0 bits are 110 and an external crystal/resonator clock option is selected,
the SLEEP instruction makes the MCU enter Standby mode. This mode is identical to
Power-down with the exception that the Oscillator is kept running. From Standby mode,
the device wakes up in six clock cycles.
Table 15. Active Clock Domains and Wake-up Sources in the Different Sleep Modes.
Active Clock Domains
Oscillators
Wake-up Sources
Sleep Mode
Idle
clk_CPU
clk_FLASH
clk_IO
X
clk_ADC
X
clk_ASY
X
Main Clock
Source
Enabled
X
Timer
Osc
Enabled
X⁽²⁾
INT0
SPM/
and Pin USI Start
EEPROM
Other
Change Condition Timer2 Ready ADC I/O
X
X
X
X
XX
ADC Noise
Reduction
X
X
X
X⁽²⁾
X⁽³⁾
X
X⁽²⁾
X
X
Power-down
X⁽³⁾
X
Power-save
X
X
X⁽³⁾
X
X
Standby⁽¹⁾
X
X⁽³⁾
X
Notes: 1. Only recommended with external crystal or resonator selected as clock source.
2. If Timer/Counter2 is not running in asynchronous mode.
3. For INT0, only level interrupt.
Power Reduction
Register
The Power Reduction Register, PRR, provides a method to stop the clock to individual
peripherals to reduce power consumption. The current state of the peripheral is frozen
and the I/O registers can not be read or written. Resources used by the peripheral when
stopping the clock will remain occupied, hence the peripheral should in most cases be
disabled before stopping the clock. Waking up a module, which is done by clearing the
bit in PRR, puts the module in the same state as before shutdown.
Module shutdown can be used in Idle mode and Active mode to significantly reduce the
overall power consumption. See “Supply Current of I/O modules” on page 290 for exam-
ples. In all other sleep modes, the clock is already stopped.
Power Reduction Register -
PRR
Bit
7
6
5
4
3
2
1
0
–
–
–
–
PRTIM1 PRSPI PRUSART0 PRADC PRR
Read/Write
R
R
R
R
R/W
R/W
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0
• Bit 7..4 - Res: Reserved bits
These bits are reserved in ATmega165 and will always read as zero.
• Bit 3 - PRTIM1: Power Reduction Timer/Counter1
Writing a logic one to this bit shuts down the Timer/Counter1 module. When the
Timer/Counter1 is enabled, operation will continue like before the shutdown.
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