AT91SAM9G20_10 Datasheet, PDF (34/42 Pages) ATMEL Corporation – AT91 ARM Thumb Microcontrollers

10.4 Embedded Peripherals
10.4.1
Serial Peripheral Interface
• Supports communication with serial external devices
– Four chip selects with external decoder support allow communication with up to 15
peripherals
– Serial memories, such as DataFlash and 3-wire EEPROMs
– Serial peripherals, such as ADCs, DACs, LCD Controllers, CAN Controllers and
Sensors
– External co-processors
• Master or slave serial peripheral bus interface
– 8- to 16-bit programmable data length per chip select
– Programmable phase and polarity per chip select
– Programmable transfer delays between consecutive transfers and between clock
and data per chip select
– Programmable delay between consecutive transfers
– Selectable mode fault detection
• Very fast transfers supported
– Transfers with baud rates up to MCK
– The chip select line may be left active to speed up transfers on the same device
10.4.2
Two-wire Interface
• Compatibility with standard two-wire serial memory
• One, two or three bytes for slave address
• Sequential read/write operations
• Supports either master or slave modes
• Compatible with standard two-wire serial memories
• Master, multi-master and slave mode operation
• Bit rate: up to 400 Kbits
• General Call supported in slave mode
• Connection to Peripheral DMA Controller (PDC) capabilities optimizes data transfers in
master mode only
– One channel for the receiver, one channel for the transmitter
– Next buffer support
10.4.3 USART
• Programmable Baud Rate Generator
• 5- to 9-bit full-duplex synchronous or asynchronous serial communications
– 1, 1.5 or 2 stop bits in Asynchronous Mode or 1 or 2 stop bits in Synchronous Mode
– Parity generation and error detection
– Framing error detection, overrun error detection
– MSB- or LSB-first
– Optional break generation and detection
34 AT91SAM9G20 Summary
6384DS–ATARM–13-Jan-10