AT91SAM7S64 Datasheet, PDF (330/482 Pages) ATMEL Corporation – AT91 ARM THUMB-BASED MICROCONTROLLERS

Synchronous Serial Controller (SSC) User Interface
Table 73. Synchronous Serial Controller (SSC) Register Mapping
Offset
Register
Register Name
0x0
Control Register
SSC_CR
0x4
Clock Mode Register
SSC_CMR
0x8
Reserved
–
0xC
Reserved
–
0x10
Receive Clock Mode Register
SSC_RCMR
0x14
Receive Frame Mode Register
SSC_RFMR
0x18
Transmit Clock Mode Register
SSC_TCMR
0x1C
Transmit Frame Mode Register
SSC_TFMR
0x20
Receive Holding Register
SSC_RHR
0x24
Transmit Holding Register
SSC_THR
0x28
Reserved
–
0x2C
Reserved
–
0x30
Receive Sync. Holding Register
SSC_RSHR
0x34
Transmit Sync. Holding Register
SSC_TSHR
0x38
Reserved
–
0x3C
Reserved
–
0x40
Status Register
SSC_SR
0x44
Interrupt Enable Register
SSC_IER
0x48
Interrupt Disable Register
SSC_IDR
0x4C
Interrupt Mask Register
SSC_IMR
0x50-0xFC Reserved
–
0x100 - 0x124 Reserved for Peripheral Data Controller (PDC)
–
Access
Write
Read/Write
–
–
Read/Write
Read/Write
Read/Write
Read/Write
Read
Write
–
–
Read
Read/Write
–
–
Read
Write
Write
Read
–
–
Reset
–
0x0
–
–
0x0
0x0
0x0
0x0
0x0
–
–
–
0x0
0x0
–
–
0x000000CC
–
–
0x0
–
–
330 AT91SAM7S64 Preliminary
6070A–ATARM–28-Oct-04