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AVR32UC Datasheet, PDF (32/118 Pages) ATMEL Corporation – Technical Reference Manual
AVR32
3.9.1.19
3.9.1.20
3.9.1.21
3.9.1.22
*(--SPSYS) = PC;
*(--SPSYS) = SR;
SR[M2:M0] = B’110;
SR[EM] = 1;
SR[GM] = 1;
PC = EVBA | 0x34;
Data Write Address Exception
The Data Write Address Error exception is generated if the address of a data memory write has
an illegal alignment.
*(--SPSYS) = PC;
*(--SPSYS) = SR;
SR[M2:M0] = B’110;
SR[EM] = 1;
SR[GM] = 1;
PC = EVBA | 0x38;
DTLB Read Miss Exception
The DTLB Read Miss exception is generated when the MPU is enabled and the data memory
read access does not hit in any regions. Used only if an MPU is present.
*(--SPSYS) = PC;
*(--SPSYS) = SR;
SR[M2:M0] = B’110;
SR[EM] = 1;
SR[GM] = 1;
PC = EVBA | 0x60;
DTLB Write Miss Exception
The DTLB Write Miss exception is generated when the MPU is enabled and the data memory
write access does not hit in any regions. Used only if an MPU is present.
*(--SPSYS) = PC;
*(--SPSYS) = SR;
SR[M2:M0] = B’110;
SR[EM] = 1;
SR[GM] = 1;
PC = EVBA | 0x70;
DTLB Read Protection Exception
The DTLB Protection exception is generated when the data memory read violates the access
rights specified by the protection region in which the address lies. Used only if an MPU is
present.
*(--SPSYS) = PC;
*(--SPSYS) = SR;
SR[M2:M0] = B’110;
SR[EM] = 1;
SR[GM] = 1;
PC = EVBA | 0x3C;
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