AT32UC3L064_10 Datasheet, PDF (32/88 Pages) ATMEL Corporation – 32-bit AVR®Microcontroller

AT32UC3L016/32/64
5. Memories
5.1 Embedded Memories
• Internal High-Speed Flash
– 64Kbytes (AT32UC3L064)
– 32Kbytes (AT32UC3L032)
– 16Kbytes (AT32UC3L016)
• 0 Wait State Access at up to 25MHz in Worst Case Conditions
• 1 Wait State Access at up to 50MHz in Worst Case Conditions
• Pipelined Flash Architecture, allowing burst reads from sequential Flash locations, hiding
penalty of 1 wait state access
• Pipelined Flash Architecture typically reduces the cycle penalty of 1 wait state operation
to only 8% compared to 0 wait state operation
• 100 000 Write Cycles, 15-year Data Retention Capability
• Sector Lock Capabilities, Bootloader Protection, Security Bit
• 32 Fuses, Erased During Chip Erase
• User Page For Data To Be Preserved During Chip Erase
• Internal High-Speed SRAM, Single-cycle access at full speed
– 16Kbytes (AT32UC3L064, AT32UC3L032)
– 8Kbytes (AT32UC3L016)
5.2 Physical Memory Map
The system bus is implemented as a bus matrix. All system bus addresses are fixed, and they
are never remapped in any way, not even in boot. Note that AVR32 UC CPU uses unsegmented
translation, as described in the AVR32 Architecture Manual. The 32-bit physical address space
is mapped as follows:
Table 5-1. AT32UC3L Physical Memory Map
Device
Start Address
Size
AT32UC3L064
Embedded SRAM 0x00000000
16 Kbytes
Embedded Flash 0x80000000
64 Kbytes
HSB-PB Bridge B 0xFFFE0000
64 Kbytes
HSB-PB Bridge A 0xFFFF0000
64 Kbytes
AT32UC3L032
16 Kbytes
32 Kbytes
64 Kbytes
64 Kbytes
AT32UC3L016
8 Kbytes
16 Kbytes
64 Kbytes
64 Kbytes
Table 5-2. Flash Memory Parameters
Part Number
AT32UC3L064
AT32UC3L032
AT32UC3L016
Flash Size (FLASH_PW)
64 Kbytes
32 Kbytes
16 Kbytes
Number of pages
(FLASH_P)
256
128
64
Page size
(FLASH_W)
256 bytes
256 bytes
256 bytes
32
32099DS–06/2010