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| AT26DF081A_14 Datasheet, PDF (32/40 Pages) ATMEL Corporation – Individual Sector Protection with Global Protect/Unprotect Feature | |||
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12.4 AC Characteristics
Symbol
Parameter
Min
fSCK
Serial Clock (SCK) Frequency
fRDLF
SCK Frequency for Read Array (Low Frequency - 03h opcode)
tSCKH
SCK High Time
6.4
tSCKL
SCK Low Time
6.4
tSCKR(1)
SCK Rise Time, Peak-to-Peak (Slew Rate)
0.1
tSCKF(1)
SCK Fall Time, Peak-to-Peak (Slew Rate)
0.1
tCSH
Chip Select High Time
50
tCSLS
Chip Select Low Setup Time (relative to SCK)
5
tCSLH
Chip Select Low Hold Time (relative to SCK)
5
tCSHS
Chip Select High Setup Time (relative to SCK)
5
tCSHH
Chip Select High Hold Time (relative to SCK)
5
tDS
Data In Setup Time
2
tDH
Data In Hold Time
3
tDIS(1)
Output Disable Time
tV(2)
Output Valid Time
tOH
Output Hold Time
0
tHLS
HOLD Low Setup Time (relative to SCK)
5
tHLH
HOLD Low Hold Time (relative to SCK)
5
tHHS
HOLD High Setup Time (relative to SCK)
5
tHHH
HOLD High Hold Time (relative to SCK)
5
tHLQZ(1)
HOLD Low to Output High-Z
tHHQX(1)
HOLD High to Output Low-Z
tWPS(1)(3)
Write Protect Setup Time
20
tWPH(1)(3)
Write Protect Hold Time
100
tSECP(1)
Sector Protect Time (from Chip Select High)
tSECUP(1)
Sector Unprotect Time (from Chip Select High)
tEDPD(1)
Chip Select High to Deep Power-down
tRDPD(1)
Chip Select High to Standby Mode
Notes: 1. Not 100% tested (value guaranteed by design and characterization).
2. 15 pF load at 70 MHz, 30 pF load at 66 MHz.
3. Only applicable as a constraint for the Write Status Register command when SPRL = 1
Max
Units
70
MHz
33
MHz
ns
ns
V/ns
V/ns
ns
ns
ns
ns
ns
ns
ns
6
ns
6
ns
ns
ns
ns
ns
ns
6
ns
6
ns
ns
ns
20
ns
20
ns
3
µs
3
µs
32 AT26DF081A
3600GâDFLASHâ06/09
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