AT80C51RD2_05 Datasheet, PDF (31/83 Pages) ATMEL Corporation – 80C51 High Performance ROM 8-bit Microcontroller

Figure 11. PCA Compare Mode and PCA Watchdog Timer
Write to
CCAPnL Reset
Write t o
CCAPnH
CF CR
CC AP nH
CCA Pn L
CCON
CCF4 CCF3 CCF2 CCF1 CCF0 0xD8
PCA IT
1
0
En ab le
16 bit comparator
Match
CH
CL
PCA counter/timer
RESET *
CCAPMn, n = 0 to 4
ECOMn CAPPn CAPNn MATn TOGn PWMn ECCFn
0xDA to 0xDE
CIDL WDTE
CMOD
CPS1 CPS0 ECF
0xD9
Before enabling ECOM bit, CCAPnL and CCAPnH should be set with a non zero value,
otherwise an unwanted match could happen. Writing to CCAPnH will set the ECOM bit.
Once ECOM set, writing CCAPnL will clear ECOM so that an unwanted match doesn’t
occur while modifying the compare value. Writing to CCAPnH will set ECOM. For this
reason, user software should write CCAPnL first, and then CCAPnH. Of course, the
ECOM bit can still be controlled by accessing to CCAPMn register.
High-speed Output Mode
In this mode, the CEX output (on port 1) associated with the PCA module will toggle
each time a match occurs between the PCA counter and the module's capture registers.
To activate this mode the TOG, MAT, and ECOM bits in the module's CCAPMn SFR
must be set (see Figure 12).
A prior write must be done to CCAPnL and CCAPnH before writing the ECOMn bit.
32 AT80C51RD2/AT83C51Rx2
4113B–8051–03/05