AT91SAM7XC256 Datasheet, PDF (306/675 Pages) ATMEL Corporation – Thumb-based Microcontrollers

Figure 31-8. NRZ to Manchester Encoding
NRZ
encoded
data
1
0
1
1
0
0
0
1
Manchester
encoded _Txd
data
The Manchester encoded character can also be encapsulated by adding both a configurable
preamble and a start frame delimiter pattern. Depending on the configuration, the preamble is
a training sequence, composed of a pre-defined pattern with a programmable length from 1 to
15 bit times. If the preamble length is set to 0, the preamble waveform is not generated prior to
any character. The preamble pattern is chosen among the following sequences: ALL_ONE,
ALL_ZERO, ONE_ZERO or ZERO_ONE, writing the field TX_PP in the US_MAN register, the
field TX_PL is used to configure the preamble length. Figure 31-9 illustrates and defines the
valid patterns. To improve flexibility, the encoding scheme can be configured using the
TX_MPOL field in the US_MAN register. If the TX_MPOL field is set to zero (default), a logic
zero is encoded with a zero-to-one transition and a logic one is encoded with a one-to-zero
transition. If the TX_MPOL field is set to one, a logic one is encoded with a one-to-zero transi-
tion and a logic zero is encoded with a zero-to-one transition.
Figure 31-9. Preamble Patterns, Default Polarity Assumed
Manchester
encoded
data ^Txd
SFD
DATA
8 bit width "ALL_ONE" Preamble
Manchester
encoded
data ^Txd
Manchester
encoded
data ^Txd
8 bit width "ALL_ZERO" Preamble
8 bit width "ZERO_ONE" Preamble
SFD
DATA
SFD
DATA
Manchester
encoded
data ^Txd
8 bit width "ONE_ZERO" Preamble
SFD
DATA
A start frame delimiter is to be configured using the ONEBIT field in the US_MR register. It
consists of a user-defined pattern that indicates the beginning of a valid data. Figure 31-10
illustrates these patterns. If the start frame delimiter, also known as start bit, is one bit,
(ONEBIT at 1), a logic zero is Manchester encoded and indicates that a new character is being
sent serially on the line. If the start frame delimiter is a synchronization pattern also referred to
as sync (ONEBIT at 0), a sequence of 3 bit times is sent serially on the line to indicate the start
306 AT91SAM7XC256/128 Preliminary
6209B–ATARM–10-Feb-06