AT80C58X2_14 Datasheet, PDF (30/62 Pages) ATMEL Corporation – 8051 pin and instruction compatible

Figure 11-1. Power-Down Exit Waveform
INT0
INT1
XTAL1
Active phase
Power-down phase Oscillator restart phase
Active phase
Exit from power-down by reset redefines all the SFRs, exit from power-down by external inter-
rupt does no affect the SFRs.
Exit from power-down by either reset or external interrupt does not affect the internal RAM
content.
NOTE: If idle mode is activated with power-down mode (IDL and PD bits set), the exit sequence
is unchanged, when execution is vectored to interrupt, PD and IDL bits are cleared and idle
mode is not entered.
Table 11-1. The state of ports during idle and power-down modes
Mode
Program
Memory
ALE
PSEN
PORT0
Idle
Internal
1
1
Port Data*
Idle
External
1
1
Floating
Power Down Internal
0
0
Port Data*
Power Down External
0
0
Floating
* Port 0 can force a "zero" level. A "one" Level will leave port floating.
PORT1
Port Data
Port Data
Port Data
Port Data
PORT2
Port Data
Address
Port Data
Port Data
PORT3
Port Data
Port Data
Port Data
Port Data
30 AT/TS8xC54/8X2
4431E–8051–04/06