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AT45BR3214B Datasheet, PDF (30/40 Pages) ATMEL Corporation – 32-MEGABIT DATAFLASH + 4-MEGABIT SRAM STACK MEMORY
4-megabit SRAM
Description
Features
Block Diagram
The 4-megabit SRAM is a high-speed, super low-power CMOS SRAM organized as
256K words by 16 bits. The SRAM uses high-performance full CMOS process technol-
ogy and is designed for high-speed and low-power circuit technology. It is particularly
well-suited for the high-density low-power system application. This device has a data
retention mode that guarantees data to remain valid at a minimum power supply voltage
of 1.2V.
• Fully Static Operation and Tri-state Output
• TTL Compatible Inputs and Outputs
• Battery Backup
– 1.2V (Min) Data Retention
Voltage (V)
2.7 - 3.3
Speed (ns)
70
Operation
Current/ICC (mA)
(Max)
3
Standby
Current (µA)
(Max)
10
Temperature
(°C)
-40 - 85
A0
ROW DECODER
I/O0
MEMORY ARRAY
256K X 16
I/O7
I/O8
I/O15
A17
SCS1
SCS2
SOE
SLB
SUB
SWE
30 AT45BR3214B
3356B–DFLASH–10/04