ATR0600 Datasheet, PDF (3/11 Pages) ATMEL Corporation – ATR0600 ATR0600

Functional
Description
LNA/Mixer Stage
IF Stage
VGA Amplifier Stage
A/D Converter Stage
Power Save Setting
Stage
4536F–GPS–10/03
ATR0600 [Preliminary]
The specification of GPS receivers for personal mobile applications strongly differs from
stand-alone GPS receiver specifications. One reason is the presence of strong blocking
signals from mobile transmitters which might cause unacceptable levels of degradation
in the carrier-to-noise ratio of a GPS system if not sufficiently suppressed. The other
reason is the requirements for very low power consumption.
The ATR0600 GPS receiver IC has been especially designed for GPS applications in
mobile phones. From this system point of view, it incorporates highest isolation between
GPS and cellular antennas, as well as low power consumption. The ATR0600 contains
a low-power single IF design and integrates a complete frequency synthesizer. It is fully
functional over a supply-voltage range of 2.7 V to 3.3 V and is housed in a 28-pin
QLN package.
The GPS receiver's input signal is a Direct Sequence Spread Spectrum (DSSS) signal
at 1575.42 MHz with a 1.023 Mbps Bi-Phase-Shift-Keying (BPSK) modulated spreading
code. As the input signal power at the antenna is approximately -140 dBm, the desired
signal is below the thermal noise floor.
The ATR0600 receives the L1 GPS signal via an external LNA. The LNA bandwidth
should be as narrow as possible to avoid interferences from out-of-band signals (espe-
cially from those of the 1800 GSM band).
Combined with the antenna the LNA provides a first filtering of the GPS signal. The LNA
in addition should have a power shutdown feature. The shutdown signal will be gener-
ated inside the digital section of the GPS receiver. The output of the LNA drives an
external SAW filter, which provides the image rejection for the mixer and the isolation of
the 1800-MHz GSM band. The output of the SAW filter drives a highly linear mixer which
down-converts the GPS signal to an IF of 97.76 MHz.
The mixer directly drives an external LC-bandpath filter. In order to provide the ultimate
selectivity of the GPS frequency before the A/D conversion of the receiver part, the
signal path of the ATR0600 combines an external filter and a second integrated filter.
We recommend to design the external filter as a 2-pole filter with quality factor Q > 25.
The output of the LC-filter drives an on-chip Variable Gain-Controlled amplifier (VGA)
which is combined with an integrated IF-bandpath filter to perform additional filtering of
GSM jamming signals. The AGC stage provides the additional gain needed to optimally
load the signal range of the following analog/digital converter. The AGC control loop can
be selected either on-chip close loop or open loop mode. Connecting the AGC_OUT
output directly to the AGC_CNTRL input activates the internal control loop.
In that case, the VGA control signal is passed to the VGA via an integrated buffer stage
including all necessary filtering (low-pass filter). The external control loop is closed by
the baseband IC ATR0620.
The output of the VGA drives the integrated 1.5-bit analog-to-digital converter stage,
which comprises two comparators and two output drivers in order to provide sign and
magnitude output bits to the baseband IC ATR0620. The comparator LOW- and HIGH-
thresholds (in Figure 1 on page 1 for SIGH and SIGL) are adjustable via external resis-
tor. The OR gate closes the internal AGC control loop.
The integrated power-control stage is controlled by the baseband IC ATR0620 via P1
and P2. The input signals control the shutdown of the reference crystal oscillator (P2) or
the shutdown of the whole RF section (P1).
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