AT49BV8011 Datasheet, PDF (3/18 Pages) ATMEL Corporation – 8-megabit (512K x 16/1M x 8) 3-volt Only Flash Memory

Block Diagram
I/O0 - I/O15/A-1
AT49BV/LV8011(T)
OUTPUT
BUFFER
INPUT
BUFFER
A0 - A18
INPUT
BUFFER
ADDRESS
LATCH
Y-DECODER
X-DECODER
IDENTIFIER
REGISTER
STATUS
REGISTER
DATA
COMPARATOR
Y-GATING
PLANE B
SECTORS
COMMAND
REGISTER
WRITE STATE
MACHINE
PROGRAM/ERASE
VOLTAGE SWITCH
CE
WE
OE
RESET
BYTE
RDY/BUSY
VPP
VCC
GND
PLANE A SECTORS
Device Operation
READ: The AT49BV/LV8011(T) is accessed like an
EPROM. When CE and OE are low and WE is high, the
data stored at the memory location determined by the
address pins are asserted on the outputs. The outputs are
put in the high impedance state whenever CE or OE is
high. This dual line control gives designers flexibility in pre-
venting bus contention.
COMMAND SEQUENCES: When the device is first pow-
ered on it will be reset to the read or standby mode,
depending upon the state of the control line inputs. In order
to perform other device functions, a series of command
sequences are entered into the device. The command
sequences are shown in the Command Definitions table
(I/O8 - I/O15 are don’t care inputs for the command codes).
The command sequences are written by applying a low
pulse on the WE or CE input with CE or WE low (respec-
tively) and OE high. The address is latched on the falling
edge of CE or WE, whichever occurs last. The data is
latched by the first rising edge of CE or WE. Standard
microprocessor write timings are used. The address
locations used in the command sequences are not affected
by entering the command sequences.
RESET: A RESET input pin is provided to ease some sys-
tem applications. When RESET is at a logic high level, the
device is in its standard operating mode. A low level on the
RESET input halts the present device operation and puts
the outputs of the device in a high impedance state. When
a high level is reasserted on the RESET pin, the device
returns to the read or standby mode, depending upon the
state of the control inputs. By applying a 12V ± 0.5V input
signal to the RESET pin, any sector can be reprogrammed
even if the sector lockout feature has been enabled (see
“Sector Programming Lockout Override” section).
ERASURE: Before a byte/word can be reprogrammed, it
must be erased. The erased state of memory bits is a logi-
cal “1”. The entire device can be erased by using the Chip
Erase command or individual sectors can be erased by
using the Sector Erase commands.
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