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AT49BV320A Datasheet, PDF (3/31 Pages) ATMEL Corporation – 32-megabit (2M x 16/4M x 8) 3-volt Only Flash Memory
AT49BV32XA(T)
The device powers on in the read mode. Command sequences are used to place the device in
other operation modes such as program and erase. The device has the capability to protect
the data in any sector (see “Sector Lockdown” section).
To increase the flexibility of the device, it contains an Erase Suspend and Program Suspend
feature. This feature will put the erase or program on hold for any amount of time and let the
user read data from or program data to any of the remaining sectors within the memory. The
end of a program or an erase cycle is detected by the READY/BUSY pin, Data Polling or by
the toggle bit.
The VPP pin provides data protection. When the VPP input is below 0.4V, the program and
erase functions are inhibited. When VPP is at 0.9V or above, normal program and erase opera-
tions can be performed.
A six-byte command (Enter Single Pulse Program Mode) sequence to remove the requirement
of entering the three-byte program sequence is offered to further improve programming time.
After entering the six-byte code, only single pulses on the write control lines are required for
writing into the device. This mode (Single Pulse Byte/Word Program) is exited by powering
down the device, or by pulsing the RESET pin low for a minimum of 500 ns and then bringing
it back to VCC. Erase, Erase Suspend/Resume and Program Suspend/Resume commands will
not work while in this mode; if entered they will result in data being programmed into the
device. It is not recommended that the six-byte code reside in the software of the final product
but only exist in external programming code.
When using the AT49BV320A(T) pinout configuration, the device always operates in the word
mode. In the AT49BV322A(T) configuration, the BYTE pin controls whether the device data
I/O pins operate in the byte or word configuration. If the BYTE pin is set at logic “1”, the device
is in word configuration, I/O0 - I/O15 are active and controlled by CE and OE.
If the BYTE pin is set at logic “0”, the device is in byte configuration, and only data I/O pins
I/O0 - I/O7 are active and controlled by CE and OE. The data I/O pins I/O8 - I/O14 are tri-
stated, and the I/O15 pin is used as an input for the LSB (A-1) address function.
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3308A–FLASH–12/02