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AT16646F Datasheet, PDF (3/6 Pages) ATMEL Corporation – AT16646 Fast Logic 16-Bit Tri-State Register
AT16646
AC Characteristics
AT16646F
Applicable over recommended operating range from Ta = 0°C to +70°C, VCC = 5.0V +/- 5% (unless otherwise noted)
Symbol
Parameter
Test Conditions(1) Min Typ Max
Units
tPHL
Propagation Delay
tPLH
CL = 50 pF
2.5
ns
tPZH
Output Enable Time
tPZL
CL = 50 pF
7.4
ns
tPHZ
Output Disable Time
tPLZ
CL = 50 pF
6.4
ns
tSK(1)
Output Skew
CL = 50 pF
0.5
ns
∆tPHL(1)
∆tPLH
Propagation Delay vs Output Loading
1.3 1.5 ns/100 pF
tsu
Set-up Time Bus to Clock
CL = 50 pF
2.0
ns
tH
Hold Time Bus to Clock
CL = 50 pF
2.0
ns
Note: 1. This parameter is guaranteed but not 100% tested.
AT16646G
Applicable over recommended operating range from Ta = 0°C to +70°C, VCC = 5.0V +/- 5% (unless otherwise noted)
Symbol
Parameter
Test Conditions(1) Min Typ Max
Units
tPHL
Propagation Delay
tPLH
CL = 50 pF
2.0
ns
tPZH
Output Enable Time
tPZL
CL = 50 pF
7.4
ns
tPHZ
Output Disable Time
tPLZ
CL = 50 pF
5.8
ns
tSK(1)
∆tPHL(1)
∆tPLH
Output Skew
Propagation Delay vs Output Loading
CL = 50 pF
0.5
0.9 1.1
ns
ns/100 pF
tsu
Set-up Time Bus to Clock
CL = 50 pF
2.0
ns
tH
Hold Time Bus to Clock
Note: 1. This parameter is guaranteed but not 100% tested.
Test Circuits(1,2)
VCC
7.0V
CL = 50 pF
2.0
Switch Position
Test
ns
Switch
VIN
Pulse
Generator
VOUT
D.U.T.
500Ω
Open Drain
Disable Low
Enable Low
Closed
50 pF
RT
500Ω
CL
Note:
1. Pulse Generator: Rate ≤ 1.0 MHz, tF ≤ 2.5 ns,
tR ≤ 2.5 ns.
2. AC tests are done with a single bit switching, and
timings need to be derated when multiple outputs are
switching in the same direction simultaneously. This
derating should not exceed 0.5 ns for 16 inputs switching
simultaneously.
All Other Tests
Open
Definitions:
CL = Load capacitance; Includes jig and probe capacitance.
RT = Termination resistance; Should be equal to ZOUT of the
Pulse Generator.
5-23