ATMEGA6490_14 Datasheet, PDF (293/392 Pages) ATMEL Corporation – High Endurance Non-volatile Memory Segments

ATmega329/3290/649/6490
27. Memory Programming
27.1
Program And Data Memory Lock Bits
The ATmega329/3290/649/6490 provides six Lock bits which can be left unprogrammed (“1”) or
can be programmed (“0”) to obtain the additional features listed in Table 27-2. The Lock bits can
only be erased to “1” with the Chip Erase command.
Table 27-1. Lock Bit Byte⁽¹⁾
Lock Bit Byte
Bit No
7
6
BLB12
5
BLB11
4
BLB02
3
BLB01
2
LB2
1
LB1
0
Description
–
–
Boot Lock bit
Boot Lock bit
Boot Lock bit
Boot Lock bit
Lock bit
Lock bit
Default Value
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
Note: 1. “1” means unprogrammed, “0” means programmed
Table 27-2. Lock Bit Protection Modes⁽¹⁾⁽²⁾
Memory Lock Bits
Protection Type
LB Mode
LB2
LB1
1
1
1
No memory lock features enabled.
Further programming of the Flash and EEPROM is
2
1
0
disabled in Parallel and Serial Programming mode. The
Fuse bits are locked in both Serial and Parallel
Programming mode.⁽¹⁾
Further programming and verification of the Flash and
3
0
0
EEPROM is disabled in Parallel and Serial Programming
mode. The Boot Lock bits and Fuse bits are locked in both
Serial and Parallel Programming mode.⁽¹⁾
BLB0 Mode BLB02 BLB01
1
1
1
No restrictions for SPM or LPM accessing the Application
section.
2
1
0
SPM is not allowed to write to the Application section.
SPM is not allowed to write to the Application section, and
LPM executing from the Boot Loader section is not
3
0
0
allowed to read from the Application section. If Interrupt
Vectors are placed in the Boot Loader section, interrupts
are disabled while executing from the Application section.
LPM executing from the Boot Loader section is not
4
0
1
allowed to read from the Application section. If Interrupt
Vectors are placed in the Boot Loader section, interrupts
are disabled while executing from the Application section.
2552K–AVR–04/11
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