AT42QT1111-AU_14 Datasheet, PDF (29/50 Pages) ATMEL Corporation – 11-key QTouch Touch Sensor IC

1 = Edge
Acquisition starts when a rising edge is detected at the SYNC pin.
When acquisition and post-processing are completed, the device
sleeps until another rising edge is detected at the SYNC pin.
REPEAT_TIME: selects the “repeat” time when “Timed” is selected as the trigger to start key acquisition. The
number entered is a multiple of 16 ms. If 0 is entered, the device will operate in a continuous free run mode; that is,
the QT1111 will not sleep after its cycle is completed but will begin the next key acquisition cycle immediately.
Default KEY_AC value:
Default MODE value:
Default SIGNAL value:
Default SYNC value:
Default REPEAT_TIME value:
1 (timed)
0 (7-key mode)
1 (parallel)
1 (edge)
2 (32 ms cycle)
7.5 Address 1: Guard Key/Comms Options
Table 7-3. Guard Key/Comms Options
Address
Bit 7
Bit 6
Bit 5
1
GUARD_KEY
Bit 4
Bit 3
GD_EN
Bit 2
SPI_EN
Bit 1
CHG
Bit 0
CRC
GUARD_KEY: specifies the key (0 to 10) to be used as a guard channel (see Section 2.3 on page 7) .
GD_EN: enables the use of a guard key; 0 = disable, 1 = enable.
SPI_EN: enables the Quick SPI interface; 0 = disable, 1 = enable.
See Section 4.1.6 on page 15 for details of the Quick SPI Mode report.
To exit this mode (and clear the SPI_EN bit), the command 0x36 should be sent. To save the settings to EEPROM
and make Quick SPI mode active on startup, send the Store to EEPROM command (0x0A). Any other data sent is
ignored in Quick SPI mode.
CHG: the CHANGE pin mode (see Section 4.5 on page 17):
0 = Data mode. In this mode the CHANGE pin is asserted to indicate unread data.
1 = Touch mode. In this mode the CHANGE pin is asserted when a key is being touched
or is in detect.
CRC: enables or disables CRC; 0 = disable, 1 = enable. When this option is enabled, each data exchange must
have a CRC byte appended.
When report or setup data is being returned by the QT1111, a 1-byte checksum is returned. The host should confirm
that this checksum is correct and, if not, should request the report again.
Where data is being sent by the host, a 1-byte CRC should be sent. The QT1111 returns the expected CRC byte in
the same transaction the CRC byte is sent. In this way, the host can immediately determine whether the setup data
bytes were received correctly.
If the host sends an incorrect CRC following a “Get” command, the QT1111 returns the code “0xEE” to indicate an
error. It then resets the SPI interface. On the next byte exchange 0x55 is transmitted.
Default GUARD_KEY value:
Default GD_EN value:
Default CHG value:
Default CRC value:
0 (Key 0)
0 (disabled)
0 (data mode)
0 (disabled)
AT42QT1111-MU / AT42QT1111-AU [DATASHEET]
29
9571C–AT42–05/2013