ATTINY20-EK1 Datasheet, PDF (28/220 Pages) ATMEL Corporation – 8-bit AVR Microcontroller with 2K Bytes In-System Programmable Flash

8. System Control and Reset
8.1 Resetting the AVR
During reset, all I/O registers are set to their initial values, and the program starts execution from the Reset Vector. The
instruction placed at the Reset Vector must be a RJMP – Relative Jump – instruction to the reset handling routine. If the
program never enables an interrupt source, the interrupt vectors are not used, and regular program code can be placed
at these locations. The circuit diagram in Figure 8-1 shows the reset logic. Electrical parameters of the reset circuitry are
defined in section “System and Reset Characteristics” on page 170.
Figure 8-1. Reset Logic
DATA BUS
BODLEVEL2...0
RESET FLAG REGISTER
(RSTFLR)
VCC
RESET
PULL-UP
RESISTOR
SPIKE
FILTER
RSTDISBL
BROWN OUT
RESET CIRCUIT
POWER-ON
RESET CIRCUIT
EXTERNAL
RESET CIRCUIT
WATCHDOG
TIMER
WATCHDOG
OSCILLATOR
COUNTER RESET
DELAY
COUNTERS
CK
SQ
TIMEOUT
R
CLOCK
GENERATOR
INTERNAL
RESET
The I/O ports of the AVR are immediately reset to their initial state when a reset source goes active. This does not require
any clock source to be running.
After all reset sources have gone inactive, a delay counter is invoked, stretching the internal reset. This allows the power
to reach a stable level before normal operation starts. The start up sequence is described in “Starting from Reset” on
page 19.
8.2 Reset Sources
The ATtiny20 has four sources of reset:
 Power-on Reset. The MCU is reset when the supply voltage is below the Power-on Reset threshold (V_POT)
 External Reset. The MCU is reset when a low level is present on the RESET pin for longer than the minimum pulse
length
 Watchdog Reset. The MCU is reset when the Watchdog Timer period expires and the Watchdog is enabled
 Brown Out Reset. The MCU is reset when the Brown-Out Detector is enabled and supply voltage is below the
brown-out threshold (V_BOT)
8.2.1
Power-on Reset
A Power-on Reset (POR) pulse is generated by an on-chip detection circuit. The detection level is defined in section
“System and Reset Characteristics” on page 170. The POR is activated whenever V_CC is below the detection level. The
POR circuit can be used to trigger the Start-up Reset, as well as to detect a failure in supply voltage.
A Power-on Reset (POR) circuit ensures that the device is reset from Power-on. Reaching the Power-on Reset threshold
voltage invokes the delay counter, which determines how long the device is kept in reset after V_CC rise. The reset signal
is activated again, without any delay, when V_CC decreases below the detection level.
ATtiny20 [DATASHEET] 28
8235E–AVR–03/2013